nios2: Remove architecture

barebox nios2 support was merged in 2011. It hasn't seen very much
active development since then and appears to have no active users.
Remove the architecture.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

7 files changed, 0 insertions, 494 deletions

diff --git a/arch/nios2/cpu/.gitignore b/arch/nios2/cpu/.gitignore
deleted file mode 100644
index d1165788c9..0000000000
--- a/arch/nios2/cpu/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-barebox.lds
diff --git a/arch/nios2/cpu/Makefile b/arch/nios2/cpu/Makefile
deleted file mode 100644
index 0b59ec57c1..0000000000
--- a/arch/nios2/cpu/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-obj-y                 += start.o
-obj-y                 += exceptions.o
-obj-y                 += cpu.o
-obj-y                 += traps.o
-extra-y               += barebox.lds
diff --git a/arch/nios2/cpu/barebox.lds.S b/arch/nios2/cpu/barebox.lds.S
deleted file mode 100644
index 8d82aa59e7..0000000000
--- a/arch/nios2/cpu/barebox.lds.S
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * barebox - barebox.lds.S
- *
- * (C) Copyright 2011, Franck JULLIEN, <elec4fun@gmail.com>
- *
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * Copyright (c) 2005-2007 Analog Device Inc.
- *
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <config.h>
-#include <asm-generic/barebox.lds.h>
-
-OUTPUT_FORMAT("elf32-littlenios2")
-OUTPUT_ARCH("nios2")
-
-SECTIONS
-{
-	. = NIOS_SOPC_TEXT_BASE;
-
-	. = ALIGN(4);
-	.text      :
-	{
-		_stext = .;
-		__text = .;
-		_text = .;
-		__bare_init_start = .;
-		*(.text_entry)
-		__bare_init_end = .;
-		*(.text)
-	}
-	BAREBOX_BARE_INIT_SIZE
-
-	. = ALIGN(4);
-
-	.rodata : {
-		*(.rodata*)
-		RO_DATA_SECTION
-	}
-
-	_etext = .; /* End of text and rodata section */
-
-	/* INIT DATA sections - "Small" data (see the gcc -G option)
-	 * is always gp-relative. Here we make all init data sections
-	 * adjacent to simplify the startup code -- and provide
-	 * the global pointer for gp-relative access.
-	 */
-	_sdata = .;
-	_data = .;
-	.data :
-	{
-	  *(.data)
-	  *(.data.*)
-	  *(.gnu.linkonce.d*)
-	}
-
-	. = ALIGN(16);
-	_gp = .;            /* Global pointer addr */
-	PROVIDE (gp = .);
-
-	.sdata :
-	{
-	  *(.sdata)
-	  *(.sdata.*)
-	  *(.gnu.linkonce.s.*)
-	}
-	. = ALIGN(4);
-
-	_edata = .;
-	PROVIDE (edata = .);
-
-	/* UNINIT DATA - Small uninitialized data is first so it's
-	 * adjacent to sdata and can be referenced via gp. The normal
-	 * bss follows. We keep it adjacent to simplify init code.
-	 */
-	__bss_start = .;
-	.sbss (NOLOAD) :
-	{
-	  *(.sbss)
-	  *(.sbss.*)
-	  *(.gnu.linkonce.sb.*)
-	  *(.scommon)
-	}
-	. = ALIGN(4);
-	.bss (NOLOAD) :
-	{
-	  *(.bss)
-	  *(.bss.*)
-	  *(.dynbss)
-	  *(COMMON)
-	  *(.scommon)
-	}
-	__bss_stop = .;
-
-	. = ALIGN(4);
-	_end = .;
-	PROVIDE (end = .);
-}
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
deleted file mode 100644
index 9f86c911cc..0000000000
--- a/arch/nios2/cpu/cpu.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <common.h>
-#include <init.h>
-#include <restart.h>
-#include <asm/system.h>
-
-static void __noreturn nios2_restart_soc(struct restart_handler *rst)
-{
-	/* indirect call to go beyond 256MB limitation of toolchain */
-	nios2_callr(RESET_ADDR);
-
-	/* Not reached */
-	hang();
-}
-
-static int restart_register_feature(void)
-{
-	return restart_handler_register_fn("vector", nios2_restart_soc);
-}
-coredevice_initcall(restart_register_feature);
-
diff --git a/arch/nios2/cpu/exceptions.S b/arch/nios2/cpu/exceptions.S
deleted file mode 100644
index 8806f5cebf..0000000000
--- a/arch/nios2/cpu/exceptions.S
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- */
-
-#include <config.h>
-#include <asm/opcodes.h>
-
-
-	.text
-	.align 4
-
-	.global _exception
-
-	.set noat
-	.set nobreak
-
-_exception:
-	/* SAVE ALL REGS -- this allows trap and unimplemented
-	 * instruction handlers to be coded conveniently in C
-	 */
-	addi    sp, sp, -(33*4)
-	stw     r0, 0(sp)
-	stw     r1, 4(sp)
-	stw     r2, 8(sp)
-	stw     r3, 12(sp)
-	stw     r4, 16(sp)
-	stw     r5, 20(sp)
-	stw     r6, 24(sp)
-	stw     r7, 28(sp)
-	stw     r8, 32(sp)
-	stw     r9, 36(sp)
-	stw     r10, 40(sp)
-	stw     r11, 44(sp)
-	stw     r12, 48(sp)
-	stw     r13, 52(sp)
-	stw     r14, 56(sp)
-	stw     r15, 60(sp)
-	stw     r16, 64(sp)
-	stw     r17, 68(sp)
-	stw     r19, 72(sp)
-	stw     r19, 76(sp)
-	stw     r20, 80(sp)
-	stw     r21, 84(sp)
-	stw     r22, 88(sp)
-	stw     r23, 92(sp)
-	stw     r24, 96(sp)
-	stw     r25, 100(sp)
-	stw     r26, 104(sp)
-	stw     r27, 108(sp)
-	stw     r28, 112(sp)
-	stw     r29, 116(sp)
-	stw     r30, 120(sp)
-	stw     r31, 124(sp)
-	rdctl   et, estatus
-	stw     et, 128(sp)
-
-	/* If interrupts are disabled -- software interrupt */
-	rdctl   et, estatus
-	andi    et, et, 1
-	beq     et, r0, 0f
-
-	/* If no interrupts are pending -- software interrupt */
-	rdctl   et, ipending
-	beq     et, r0, 0f
-
-        br      _exception_return
-
-	/* Return address fixup: execution resumes by re-issue of
-	 * interrupted instruction at ea-4 (ea == r29). Here we do
-	 * simple fixup to allow common exception return.
-	 */
-	ldw     r3, 116(sp)
-	addi    r3, r3, -4
-	stw     r3, 116(sp)
-	br      _exception_return
-
-0:
-	/* TRAP EXCEPTION */
-	movhi   r3, %hi(OPC_TRAP)
-	ori     r3, r3, %lo(OPC_TRAP)
-	addi    r1, ea, -4
-	ldw     r1, 0(r1)
-	bne     r1, r3, 1f
-	movhi   r3, %hi(trap_handler)
-	ori     r3, r3, %lo(trap_handler)
-	mov     r4, sp  /* ptr to regs */
-	callr   r3
-	br      _exception_return
-
-1:
-	/* UNIMPLEMENTED INSTRUCTION EXCEPTION */
-	movhi   r3, %hi(soft_emulation)
-	ori     r3, r3, %lo(soft_emulation)
-	mov     r4, sp  /* ptr to regs */
-	callr   r3
-
-	/* Restore registers and return from exception */
-_exception_return:
-	ldw     r1, 4(sp)
-	ldw     r2, 8(sp)
-	ldw     r3, 12(sp)
-	ldw     r4, 16(sp)
-	ldw     r5, 20(sp)
-	ldw     r6, 24(sp)
-	ldw     r7, 28(sp)
-	ldw     r8, 32(sp)
-	ldw     r9, 36(sp)
-	ldw     r10, 40(sp)
-	ldw     r11, 44(sp)
-	ldw     r12, 48(sp)
-	ldw     r13, 52(sp)
-	ldw     r14, 56(sp)
-	ldw     r15, 60(sp)
-	ldw     r16, 64(sp)
-	ldw     r17, 68(sp)
-	ldw     r19, 72(sp)
-	ldw     r19, 76(sp)
-	ldw     r20, 80(sp)
-	ldw     r21, 84(sp)
-	ldw     r22, 88(sp)
-	ldw     r23, 92(sp)
-	ldw     r24, 96(sp)
-	ldw     r25, 100(sp)
-	ldw     r26, 104(sp)
-	ldw     r27, 108(sp)
-	ldw     r28, 112(sp)
-	ldw     r29, 116(sp)
-	ldw     r30, 120(sp)
-	ldw     r31, 124(sp)
-	addi    sp, sp, (33*4)
-	eret
-/*-------------------------------------------------------------*/
diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
deleted file mode 100644
index d770b0014d..0000000000
--- a/arch/nios2/cpu/start.S
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <config.h>
-#include <asm-generic/memory_layout.h>
-
-/*************************************************************************
- * RESTART
- ************************************************************************/
-
-.section ".text_entry","ax"
-
-_start:
-	wrctl   status, r0      /* Disable interrupts */
-	/* ICACHE INIT -- only the icache line at the reset address
-	 * is invalidated at reset. So the init must stay within
-	 * the cache line size (8 words). If GERMS is used, we'll
-	 * just be invalidating the cache a second time. If cache
-	 * is not implemented initi behaves as nop.
-	 */
-	ori     r4, r0, %lo(ICACHE_LINE_SIZE)
-	movhi   r5, %hi(ICACHE_SIZE)
-	ori     r5, r5, %lo(ICACHE_SIZE)
-0:	initi   r5
-	sub     r5, r5, r4
-	bgt     r5, r0, 0b
-	br      _except_end   /* Skip the tramp */
-
-	/* EXCEPTION TRAMPOLINE -- the following gets copied
-	 * to the exception address (below), but is otherwise at the
-	 * default exception vector offset (0x0020).
-	 */
-_except_start:
-	movhi   et, %hi(_exception)
-	ori     et, et, %lo(_exception)
-	jmp     et
-_except_end:
-
-	/* INTERRUPTS -- for now, all interrupts masked and globally
-	 * disabled.
-	 */
-	wrctl   ienable, r0  /* All disabled */
-
-	/* DCACHE INIT -- if dcache not implemented, initd behaves as
-	 * nop.
-	 */
-	movhi   r4, %hi(DCACHE_LINE_SIZE)
-	ori     r4, r4, %lo(DCACHE_LINE_SIZE)
-	movhi   r5, %hi(DCACHE_SIZE)
-	ori     r5, r5, %lo(DCACHE_SIZE)
-	mov     r6, r0
-1:	initd   0(r6)
-	add     r6, r6, r4
-	bltu    r6, r5, 1b
-
-	/* RELOCATE CODE, DATA & COMMAND TABLE -- the following code
-	 * assumes code, data and the command table are all
-	 * contiguous. This lets us relocate everything as a single
-	 * block. Make sure the linker script matches this ;-)
-	 */
-	nextpc  r4
-_cur:	movhi   r5, %hi(_cur - _start)
-	ori     r5, r5, %lo(_cur - _start)
-	sub     r4, r4, r5                 /* r4 <- cur _start */
-	mov     r8, r4
-	movhi   r5, %hi(_start)
-	ori     r5, r5, %lo(_start)        /* r5 <- linked _start */
-	beq     r4, r5, 3f
-
-	movhi   r6, %hi(_edata)
-	ori     r6, r6, %lo(_edata)
-2:	ldwio   r7, 0(r4)
-	addi    r4, r4, 4
-	stwio   r7, 0(r5)
-	addi    r5, r5, 4
-	bne     r5, r6, 2b
-3:
-
-	/* ZERO BSS/SBSS -- bss and sbss are assumed to be adjacent
-	 * and between __bss_start and _end.
-	 */
-	 movhi  r5, %hi(__bss_start)
-	 ori    r5, r5, %lo(__bss_start)
-	 movhi  r6, %hi(_end)
-	 ori    r6, r6, %lo(_end)
-	 beq    r5, r6, 5f
-
-4:	stwio   r0, 0(r5)
-	 addi   r5, r5, 4
-	 bne    r5, r6, 4b
-5:
-
-	/* JUMP TO RELOC ADDR */
-	movhi   r4, %hi(_reloc)
-	ori     r4, r4, %lo(_reloc)
-	jmp     r4
-_reloc:
-
-	/* COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
-	 * exception address. Define CONFIG_ROM_STUBS to prevent
-	 * the copy (e.g. exception in flash or in other
-	 * softare/firmware component).
-	 */
-#if !defined(CONFIG_ROM_STUBS)
-	movhi   r4, %hi(_except_start)
-	ori     r4, r4, %lo(_except_start)
-	movhi   r5, %hi(_except_end)
-	ori     r5, r5, %lo(_except_end)
-	movhi   r6, %hi(EXCEPTION_ADDR)
-	ori     r6, r6, %lo(EXCEPTION_ADDR)
-	beq     r4, r6, 7f                  /* Skip if at proper addr */
-
-6:	ldwio   r7, 0(r4)
-	stwio   r7, 0(r6)
-	addi    r4, r4, 4
-	addi    r6, r6, 4
-	bne     r4, r5, 6b
-7:
-#endif
-
-	/* STACK INIT -- zero top two words for call back chain.
-	 */
-	movhi   sp, %hi(STACK_BASE)
-	ori     sp, sp, %lo(STACK_BASE)
-	addi    sp, sp, -8
-	stw     r0, 0(sp)
-	stw     r0, 4(sp)
-	mov     fp, sp
-
-        /* Set the global pointer */
-	movhi   r26, %hi(_gp)
-	ori     r26, r26, %lo(_gp)
-
-	/*
-	 * Call board_init -- never returns
-	 */
-	movhi   r4, %hi(nios_start_barebox@h)
-	ori     r4, r4, %lo(nios_start_barebox@h)
-	callr   r4
-
-	/* NEVER RETURNS -- but branch to the _start just
-	 * in case ;-)
-	 */
-	br      _start
-
diff --git a/arch/nios2/cpu/traps.c b/arch/nios2/cpu/traps.c
deleted file mode 100644
index 484d007090..0000000000
--- a/arch/nios2/cpu/traps.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <asm/ptrace.h>
-#include <common.h>
-
-void trap_handler (struct pt_regs *regs)
-{
-	/* Just issue warning */
-	printf("\n\n*** WARNING: unimplemented trap @ %08x\n\n",
-			regs->reg[29] - 4);
-}
-
-void soft_emulation(struct pt_regs *regs)
-{
-	/* TODO: Software emulation of mul/div etc. Until this is
-	 * implemented, generate warning and hang.
-	 */
-	printf("\n\n*** ERROR: unimplemented instruction @ %08x\n",
-			regs->reg[29] - 4);
-
-	hang();
-}