diff options
author | Renaud Barbier <renaud.barbier@ge.com> | 2013-11-05 15:36:08 +0000 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-11-06 11:04:37 +0100 |
commit | 2e6750444ee4455938fa0e19d85744b67dd8e1d2 (patch) | |
tree | de041ab5c4fe45554053015539853d7ae6de09c7 /arch/ppc/include | |
parent | c3a0d67f77eec29ad2a3eb24a328becfd693ab8f (diff) | |
download | barebox-2e6750444ee4455938fa0e19d85744b67dd8e1d2.tar.gz barebox-2e6750444ee4455938fa0e19d85744b67dd8e1d2.tar.xz |
ppc: mpc85xx: mpc8544 support
Definitions are added to support the mpc8544 sOC.
The function returning the I2C bus frequency is updated
to take into account the mpc8544 specific clock ratio.
A mininal GPIO API is added to enable and set the GPIO
out pins.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/ppc/include')
-rw-r--r-- | arch/ppc/include/asm/fsl_lbc.h | 12 | ||||
-rw-r--r-- | arch/ppc/include/asm/processor.h | 2 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/ppc/include/asm/fsl_lbc.h b/arch/ppc/include/asm/fsl_lbc.h index 58cd080e50..a59725cf3a 100644 --- a/arch/ppc/include/asm/fsl_lbc.h +++ b/arch/ppc/include/asm/fsl_lbc.h @@ -27,6 +27,7 @@ #define BR_PS_32 0x00001800 /* Port Size 32 bit */ #define BR_V 0x00000001 #define BR_V_SHIFT 0 +#define BR_MS_UPMA 0x00000080 /* Convert an address into the right format for the BR registers */ #define BR_PHYS_ADDR(x) ((x) & 0xffff8000) @@ -55,5 +56,16 @@ #define fsl_set_lbc_br(x, v) (out_be32((LBC_BASE_ADDR + FSL_LBC_BRX(x)), v)) #define fsl_set_lbc_or(x, v) (out_be32((LBC_BASE_ADDR + FSL_LBC_ORX(x)), v)) +#define FSL_LBC_MAR_OFFSET 0x68 +#define FSL_LBC_MAMR_OFFSET 0x70 +#define FSL_LBC_MDR_OFFSET 0x88 +#define FSL_LBC_LTESR_OFFSET 0xB0 +#define FSL_LBC_LTEIR_OFFSET 0xB8 + +#define MxMR_MAD_MSK 0x0000003f /* Machine Address Mask */ +#define MxMR_GPL_x4DIS 0x00040000 /* GPL_A4 Ouput Line Disable */ +#define MxMR_OP_NORM 0x00000000 /* Normal Operation */ +#define MxMR_OP_WARR 0x10000000 /* Write to Array */ + #endif /* __ASSEMBLY__ */ #endif /* __ASM_PPC_FSL_LBC_H */ diff --git a/arch/ppc/include/asm/processor.h b/arch/ppc/include/asm/processor.h index 9145257fa1..19530b0a5f 100644 --- a/arch/ppc/include/asm/processor.h +++ b/arch/ppc/include/asm/processor.h @@ -858,6 +858,8 @@ #define SVR_8548 0x8031 #define SVR_8548_E 0x8039 #define SVR_8641 0x8090 +#define SVR_8544 0x803401 +#define SVR_8544_E 0x803C01 #define SVR_P2020 0x80E200 #define SVR_P2020_E 0x80EA00 |