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author | Renaud Barbier <renaud.barbier@ge.com> | 2012-05-10 14:54:31 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-05-11 09:06:44 +0200 |
commit | f755d703c450c8c828c4eb503e6a61a5c1e2c38e (patch) | |
tree | 2c9e908a74e10b234c86b7525f2fb2d43430672d /arch/ppc/include | |
parent | 87b302f4e2411749241fb4d13b6f1583ebbfd88a (diff) | |
download | barebox-f755d703c450c8c828c4eb503e6a61a5c1e2c38e.tar.gz barebox-f755d703c450c8c828c4eb503e6a61a5c1e2c38e.tar.xz |
ppc io.h: update following MMIO primitives fix
Following the MMIO primitives fix, the definitions of __raw_* function
is sourced from Linux and added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/ppc/include')
-rw-r--r-- | arch/ppc/include/asm/io.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/ppc/include/asm/io.h b/arch/ppc/include/asm/io.h index 13187cae24..00529898dd 100644 --- a/arch/ppc/include/asm/io.h +++ b/arch/ppc/include/asm/io.h @@ -105,6 +105,34 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, int nl); #define iobarrier_w() eieio() /* + * Non ordered and non-swapping "raw" accessors + */ +static inline unsigned char __raw_readb(const volatile void __iomem *addr) +{ + return *(volatile unsigned char __force *)(addr); +} +static inline unsigned short __raw_readw(const volatile void __iomem *addr) +{ + return *(volatile unsigned short __force *)(addr); +} +static inline unsigned int __raw_readl(const volatile void __iomem *addr) +{ + return *(volatile unsigned int __force *)(addr); +} +static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) +{ + *(volatile unsigned char __force *)(addr) = v; +} +static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) +{ + *(volatile unsigned short __force *)(addr) = v; +} +static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) +{ + *(volatile unsigned int __force *)(addr) = v; +} + +/* * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. */ extern inline int in_8(volatile u8 *addr) |