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authorAhmad Fatoum <a.fatoum@pengutronix.de>2021-06-19 06:50:41 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-06-24 08:53:47 +0200
commit963b55822f6db510c9aff6a6a75aa4d7a5efb460 (patch)
tree4e87f82380728a0849b08390393ee86d21e34807 /arch/riscv/include/asm/io.h
parentd5306194c6e17597eb67a18279f4ecf5dee69539 (diff)
downloadbarebox-963b55822f6db510c9aff6a6a75aa4d7a5efb460.tar.gz
barebox-963b55822f6db510c9aff6a6a75aa4d7a5efb460.tar.xz
net: designware: fix non-1:1 mapped 64-bit systems
drivers/net/designware.c handles the older Designware < 4.x MAC IPs, which do not support DMA beyond 32-bit. They are still being integrated into SoCs with 64-bit CPUs like the StarFive JH7100, which additionally needs a non 1:1 mapping for coherent DMA. Fix the driver to support such usage. The driver still has the assumption that barebox core will only pass it 32-bit pointers. This is now made explicit by returning error codes when the DMA mask is violated. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20210619045055.779-16-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/riscv/include/asm/io.h')
-rw-r--r--arch/riscv/include/asm/io.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 3cdea7fcac..795e670e3b 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -5,4 +5,14 @@
#include <asm-generic/io.h>
+static inline void *phys_to_virt(unsigned long phys)
+{
+ return (void *)phys;
+}
+
+static inline unsigned long virt_to_phys(volatile void *mem)
+{
+ return (unsigned long)mem;
+}
+
#endif /* __ASM_RISCV_IO_H */