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author | Alexey Galakhov <agalakhov@gmail.com> | 2012-05-18 15:43:26 +0600 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-05-21 21:58:26 +0200 |
commit | 7a05b45b4b4890d72841d8afa9ed0ca3f775577f (patch) | |
tree | e6bd92083dbf89d8e195daed087a9e926f955d68 /arch | |
parent | 5ef3ecd922e459b50b7a2e4c61d8b876ee1c146a (diff) | |
download | barebox-7a05b45b4b4890d72841d8afa9ed0ca3f775577f.tar.gz barebox-7a05b45b4b4890d72841d8afa9ed0ca3f775577f.tar.xz |
Split S3C generic and S3C24xx specific code
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-samsung/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/mach-samsung/generic.c | 113 | ||||
-rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c-clocks.h | 22 | ||||
-rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c-generic.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c-iomap.h | 53 | ||||
-rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c24xx-clocks.h | 24 | ||||
-rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c24xx-gpio.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c24xx-iomap.h | 69 | ||||
-rw-r--r-- | arch/arm/mach-samsung/lowlevel-s3c24x0.S (renamed from arch/arm/mach-samsung/lowlevel-init.S) | 0 | ||||
-rw-r--r-- | arch/arm/mach-samsung/mem-s3c24x0.c | 143 |
10 files changed, 258 insertions, 180 deletions
diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile index 349ba9b0ce..bde707f724 100644 --- a/arch/arm/mach-samsung/Makefile +++ b/arch/arm/mach-samsung/Makefile @@ -1,3 +1,4 @@ obj-y += s3c-timer.o generic.o -obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o -obj-$(CONFIG_S3C_LOWLEVEL_INIT) += lowlevel-init.o +obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o +obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o +obj-$(CONFIG_S3C_LOWLEVEL_INIT) += $(obj-lowlevel-y) diff --git a/arch/arm/mach-samsung/generic.c b/arch/arm/mach-samsung/generic.c index 7706be2628..7095294d52 100644 --- a/arch/arm/mach-samsung/generic.c +++ b/arch/arm/mach-samsung/generic.c @@ -25,65 +25,9 @@ #include <config.h> #include <common.h> #include <init.h> -#include <clock.h> #include <io.h> -#include <sizes.h> #include <mach/s3c-iomap.h> #include <mach/s3c-generic.h> -#include <mach/s3c-busctl.h> -#include <mach/s3c24xx-gpio.h> - -/** - * Calculate the amount of connected and available memory - * @return Memory size in bytes - */ -uint32_t s3c24xx_get_memory_size(void) -{ - uint32_t reg, size; - - /* - * detect the current memory size - */ - reg = readl(S3C_BANKSIZE); - - switch (reg & 0x7) { - case 0: - size = SZ_32M; - break; - case 1: - size = SZ_64M; - break; - case 2: - size = SZ_128M; - break; - case 4: - size = SZ_2M; - break; - case 5: - size = SZ_4M; - break; - case 6: - size = SZ_8M; - break; - default: - size = SZ_16M; - break; - } - - /* - * Is bank7 also configured for SDRAM usage? - */ - if ((readl(S3C_BANKCON7) & (0x3 << 15)) == (0x3 << 15)) - size <<= 1; /* also count this bank */ - - return size; -} - -void s3c24xx_disable_second_sdram_bank(void) -{ - writel(readl(S3C_BANKCON7) & ~(0x3 << 15), S3C_BANKCON7); - writel(readl(S3C_MISCCR) | (1 << 18), S3C_MISCCR); /* disable its clock */ -} #define S3C_WTCON (S3C_WATCHDOG_BASE) #define S3C_WTDAT (S3C_WATCHDOG_BASE + 0x04) @@ -105,60 +49,3 @@ void __noreturn reset_cpu(unsigned long addr) ; } EXPORT_SYMBOL(reset_cpu); - -/** - -@page dev_s3c24xx_arch Samsung's S3C24xx Platforms in barebox - -@section s3c24xx_boards Boards using S3C24xx Processors - -@li @subpage arch/arm/boards/a9m2410/a9m2410.c -@li @subpage arch/arm/boards/a9m2440/a9m2440.c - -@section s3c24xx_arch Documentation for S3C24xx Architectures Files - -@li @subpage arch/arm/mach-s3c24xx/generic.c - -@section s3c24xx_mem_map SDRAM Memory Map - -SDRAM starts at address 0x3000.0000 up to the available amount of connected -SDRAM memory. Physically this CPU can handle up to 256MiB (two areas with -up to 128MiB each). - -@subsection s3c24xx_mem_generic_map Generic Map -- 0x0000.0000 Start of the internal SRAM when booting from NAND flash memory or CS signal to a NOR flash memory. -- 0x0800.0000 Start of I/O space. -- 0x3000.0000 Start of SDRAM area. - - 0x3000.0100 Start of the TAG list area. - - 0x3000.8000 Start of the linux kernel (physical address). -- 0x4000.0000 Start of internal SRAM, when booting from NOR flash memory -- 0x4800.0000 Start of the internal I/O area - -@section s3c24xx_asm_arm include/asm-arm/arch-s3c24xx directory guidelines -All S3C24xx common headers are located here. - -@note Do not add board specific header files/information here. -*/ - -/** @page dev_s3c24xx_mach Samsung's S3C24xx based platforms - -@par barebox Map - -The location of the @a barebox itself depends on the available amount of -installed SDRAM memory: - -- 0x30fc.0000 Start of @a barebox when 16MiB SDRAM is available -- 0x31fc.0000 Start of @a barebox when 32MiB SDRAM is available -- 0x33fc.0000 Start of @a barebox when 64MiB SDRAM is available - -Adjust the @p CONFIG_TEXT_BASE/CONFIG_ARCH_TEXT_BASE symbol in accordance to -the available memory. - -@note The RAM based filesystem and the stack resides always below the -@a barebox start address. - -@li @subpage dev_s3c24xx_wd_handling -@li @subpage dev_s3c24xx_pll_handling -@li @subpage dev_s3c24xx_sdram_handling -@li @subpage dev_s3c24xx_nandboot_handling -*/ diff --git a/arch/arm/mach-samsung/include/mach/s3c-clocks.h b/arch/arm/mach-samsung/include/mach/s3c-clocks.h index 44b2a6c8ee..b8894f8d24 100644 --- a/arch/arm/mach-samsung/include/mach/s3c-clocks.h +++ b/arch/arm/mach-samsung/include/mach/s3c-clocks.h @@ -1,5 +1,6 @@ /* - * Copyright (C) 2011 Juergen Beisert, Pengutronix + * See file CREDITS for list of people who contributed to this + * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -10,22 +11,19 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * */ #ifndef __MACH_S3C_CLOCKS_H -# define __MACH_S3C_CLOCKS_H +#define __MACH_S3C_CLOCKS_H #ifdef CONFIG_ARCH_S3C24xx -# define S3C_LOCKTIME (S3C_CLOCK_POWER_BASE) -# define S3C_MPLLCON (S3C_CLOCK_POWER_BASE + 0x4) -# define S3C_UPLLCON (S3C_CLOCK_POWER_BASE + 0x8) -# define S3C_CLKCON (S3C_CLOCK_POWER_BASE + 0xc) -# define S3C_CLKSLOW (S3C_CLOCK_POWER_BASE + 0x10) -# define S3C_CLKDIVN (S3C_CLOCK_POWER_BASE + 0x14) - -# define S3C_MPLLCON_GET_MDIV(x) ((((x) >> 12) & 0xff) + 8) -# define S3C_MPLLCON_GET_PDIV(x) ((((x) >> 4) & 0x3f) + 2) -# define S3C_MPLLCON_GET_SDIV(x) ((x) & 0x3) +# include <mach/s3c24xx-clocks.h> #endif #endif /* __MACH_S3C_CLOCKS_H */ diff --git a/arch/arm/mach-samsung/include/mach/s3c-generic.h b/arch/arm/mach-samsung/include/mach/s3c-generic.h index 5d3808ef5b..9d40ef8dfe 100644 --- a/arch/arm/mach-samsung/include/mach/s3c-generic.h +++ b/arch/arm/mach-samsung/include/mach/s3c-generic.h @@ -33,6 +33,7 @@ uint32_t s3c_get_uclk(void); unsigned s3c_get_uart_clk(unsigned src); +#ifdef CONFIG_ARCH_S3C24xx uint32_t s3c24xx_get_memory_size(void); - void s3c24xx_disable_second_sdram_bank(void); +#endif diff --git a/arch/arm/mach-samsung/include/mach/s3c-iomap.h b/arch/arm/mach-samsung/include/mach/s3c-iomap.h index 60d44e3165..87919cc8fb 100644 --- a/arch/arm/mach-samsung/include/mach/s3c-iomap.h +++ b/arch/arm/mach-samsung/include/mach/s3c-iomap.h @@ -1,5 +1,6 @@ /* - * Copyright (C) 2009 Juergen Beisert, Pengutronix + * See file CREDITS for list of people who contributed to this + * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -18,52 +19,6 @@ * */ -/* S3C2410 device base addresses */ -#define S3C_MEMCTL_BASE 0x48000000 -#define S3C2410_USB_HOST_BASE 0x49000000 -#define S3C2410_INTERRUPT_BASE 0x4A000000 -#define S3C2410_DMA_BASE 0x4B000000 -#define S3C_CLOCK_POWER_BASE 0x4C000000 -#define S3C2410_LCD_BASE 0x4D000000 -#define S3C24X0_NAND_BASE 0x4E000000 -#define S3C_UART_BASE 0x50000000 -#define S3C_TIMER_BASE 0x51000000 -#define S3C2410_USB_DEVICE_BASE 0x52000140 -#define S3C_WATCHDOG_BASE 0x53000000 -#define S3C2410_I2C_BASE 0x54000000 -#define S3C2410_I2S_BASE 0x55000000 -#define S3C_GPIO_BASE 0x56000000 -#define S3C2410_RTC_BASE 0x57000000 -#define S3C2410_ADC_BASE 0x58000000 -#define S3C2410_SPI_BASE 0x59000000 -#define S3C2410_SDI_BASE 0x5A000000 - -/* external IO space */ -#define S3C_CS0_BASE 0x00000000 -#define S3C_CS1_BASE 0x08000000 -#define S3C_CS2_BASE 0x10000000 -#define S3C_CS3_BASE 0x18000000 -#define S3C_CS4_BASE 0x20000000 -#define S3C_CS5_BASE 0x28000000 -#define S3C_CS6_BASE 0x30000000 - -#define S3C_SDRAM_BASE S3C_CS6_BASE -#define S3C_SDRAM_END (S3C_SDRAM_BASE + 0x10000000) - -/* - * if we are booting from NAND, its internal SRAM occures at - * a different address than without this feature - */ -#ifdef CONFIG_S3C_NAND_BOOT -# define NFC_RAM_AREA 0x00000000 -#else -# define NFC_RAM_AREA 0x40000000 +#ifdef CONFIG_ARCH_S3C24xx +# include <mach/s3c24xx-iomap.h> #endif -#define NFC_RAM_SIZE 4096 - -#define S3C_UART1_BASE (S3C_UART_BASE) -#define S3C_UART1_SIZE 0x4000 -#define S3C_UART2_BASE (S3C_UART_BASE + 0x4000) -#define S3C_UART2_SIZE 0x4000 -#define S3C_UART3_BASE (S3C_UART_BASE + 0x8000) -#define S3C_UART3_SIZE 0x4000 diff --git a/arch/arm/mach-samsung/include/mach/s3c24xx-clocks.h b/arch/arm/mach-samsung/include/mach/s3c24xx-clocks.h new file mode 100644 index 0000000000..839dfe3c99 --- /dev/null +++ b/arch/arm/mach-samsung/include/mach/s3c24xx-clocks.h @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2011 Juergen Beisert, Pengutronix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +# define S3C_LOCKTIME (S3C_CLOCK_POWER_BASE) +# define S3C_MPLLCON (S3C_CLOCK_POWER_BASE + 0x4) +# define S3C_UPLLCON (S3C_CLOCK_POWER_BASE + 0x8) +# define S3C_CLKCON (S3C_CLOCK_POWER_BASE + 0xc) +# define S3C_CLKSLOW (S3C_CLOCK_POWER_BASE + 0x10) +# define S3C_CLKDIVN (S3C_CLOCK_POWER_BASE + 0x14) + +# define S3C_MPLLCON_GET_MDIV(x) ((((x) >> 12) & 0xff) + 8) +# define S3C_MPLLCON_GET_PDIV(x) ((((x) >> 4) & 0x3f) + 2) +# define S3C_MPLLCON_GET_SDIV(x) ((x) & 0x3) diff --git a/arch/arm/mach-samsung/include/mach/s3c24xx-gpio.h b/arch/arm/mach-samsung/include/mach/s3c24xx-gpio.h index c83597410c..ffb57fbd1f 100644 --- a/arch/arm/mach-samsung/include/mach/s3c24xx-gpio.h +++ b/arch/arm/mach-samsung/include/mach/s3c24xx-gpio.h @@ -12,8 +12,8 @@ * GNU General Public License for more details. */ -#ifndef __MACH_S3C24XX_GPIO_H -# define __MACH_S3C24XX_GPIO_H +#ifndef __MACH_GPIO_S3C24X0_H +# define __MACH_GPIO_S3C24X0_H #define S3C_GPACON (S3C_GPIO_BASE) #define S3C_GPADAT (S3C_GPIO_BASE + 0x04) @@ -74,4 +74,4 @@ # define S3C_DSC1 (S3C_GPIO_BASE + 0xc8) #endif -#endif /* __MACH_S3C24XX_GPIO_H */ +#endif /* __MACH_GPIO_S3C24X0_H */ diff --git a/arch/arm/mach-samsung/include/mach/s3c24xx-iomap.h b/arch/arm/mach-samsung/include/mach/s3c24xx-iomap.h new file mode 100644 index 0000000000..60d44e3165 --- /dev/null +++ b/arch/arm/mach-samsung/include/mach/s3c24xx-iomap.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2009 Juergen Beisert, Pengutronix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +/* S3C2410 device base addresses */ +#define S3C_MEMCTL_BASE 0x48000000 +#define S3C2410_USB_HOST_BASE 0x49000000 +#define S3C2410_INTERRUPT_BASE 0x4A000000 +#define S3C2410_DMA_BASE 0x4B000000 +#define S3C_CLOCK_POWER_BASE 0x4C000000 +#define S3C2410_LCD_BASE 0x4D000000 +#define S3C24X0_NAND_BASE 0x4E000000 +#define S3C_UART_BASE 0x50000000 +#define S3C_TIMER_BASE 0x51000000 +#define S3C2410_USB_DEVICE_BASE 0x52000140 +#define S3C_WATCHDOG_BASE 0x53000000 +#define S3C2410_I2C_BASE 0x54000000 +#define S3C2410_I2S_BASE 0x55000000 +#define S3C_GPIO_BASE 0x56000000 +#define S3C2410_RTC_BASE 0x57000000 +#define S3C2410_ADC_BASE 0x58000000 +#define S3C2410_SPI_BASE 0x59000000 +#define S3C2410_SDI_BASE 0x5A000000 + +/* external IO space */ +#define S3C_CS0_BASE 0x00000000 +#define S3C_CS1_BASE 0x08000000 +#define S3C_CS2_BASE 0x10000000 +#define S3C_CS3_BASE 0x18000000 +#define S3C_CS4_BASE 0x20000000 +#define S3C_CS5_BASE 0x28000000 +#define S3C_CS6_BASE 0x30000000 + +#define S3C_SDRAM_BASE S3C_CS6_BASE +#define S3C_SDRAM_END (S3C_SDRAM_BASE + 0x10000000) + +/* + * if we are booting from NAND, its internal SRAM occures at + * a different address than without this feature + */ +#ifdef CONFIG_S3C_NAND_BOOT +# define NFC_RAM_AREA 0x00000000 +#else +# define NFC_RAM_AREA 0x40000000 +#endif +#define NFC_RAM_SIZE 4096 + +#define S3C_UART1_BASE (S3C_UART_BASE) +#define S3C_UART1_SIZE 0x4000 +#define S3C_UART2_BASE (S3C_UART_BASE + 0x4000) +#define S3C_UART2_SIZE 0x4000 +#define S3C_UART3_BASE (S3C_UART_BASE + 0x8000) +#define S3C_UART3_SIZE 0x4000 diff --git a/arch/arm/mach-samsung/lowlevel-init.S b/arch/arm/mach-samsung/lowlevel-s3c24x0.S index e9471a5a17..e9471a5a17 100644 --- a/arch/arm/mach-samsung/lowlevel-init.S +++ b/arch/arm/mach-samsung/lowlevel-s3c24x0.S diff --git a/arch/arm/mach-samsung/mem-s3c24x0.c b/arch/arm/mach-samsung/mem-s3c24x0.c new file mode 100644 index 0000000000..6fae72b5a1 --- /dev/null +++ b/arch/arm/mach-samsung/mem-s3c24x0.c @@ -0,0 +1,143 @@ +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +/** + * @file + * @brief Basic clock, sdram and timer handling for S3C24xx CPUs + */ + +#include <config.h> +#include <common.h> +#include <init.h> +#include <clock.h> +#include <io.h> +#include <sizes.h> +#include <mach/s3c-iomap.h> +#include <mach/s3c-generic.h> +#include <mach/s3c-busctl.h> +#include <mach/s3c24xx-gpio.h> + +/** + * Calculate the amount of connected and available memory + * @return Memory size in bytes + */ +uint32_t s3c24xx_get_memory_size(void) +{ + uint32_t reg, size; + + /* + * detect the current memory size + */ + reg = readl(S3C_BANKSIZE); + + switch (reg & 0x7) { + case 0: + size = SZ_32M; + break; + case 1: + size = SZ_64M; + break; + case 2: + size = SZ_128M; + break; + case 4: + size = SZ_2M; + break; + case 5: + size = SZ_4M; + break; + case 6: + size = SZ_8M; + break; + default: + size = SZ_16M; + break; + } + + /* + * Is bank7 also configured for SDRAM usage? + */ + if ((readl(S3C_BANKCON7) & (0x3 << 15)) == (0x3 << 15)) + size <<= 1; /* also count this bank */ + + return size; +} + +void s3c24xx_disable_second_sdram_bank(void) +{ + writel(readl(S3C_BANKCON7) & ~(0x3 << 15), S3C_BANKCON7); + writel(readl(S3C_MISCCR) | (1 << 18), S3C_MISCCR); /* disable its clock */ +} + +/** + +@page dev_s3c24xx_arch Samsung's S3C24xx Platforms in barebox + +@section s3c24xx_boards Boards using S3C24xx Processors + +@li @subpage arch/arm/boards/a9m2410/a9m2410.c +@li @subpage arch/arm/boards/a9m2440/a9m2440.c + +@section s3c24xx_arch Documentation for S3C24xx Architectures Files + +@li @subpage arch/arm/mach-s3c24xx/generic.c + +@section s3c24xx_mem_map SDRAM Memory Map + +SDRAM starts at address 0x3000.0000 up to the available amount of connected +SDRAM memory. Physically this CPU can handle up to 256MiB (two areas with +up to 128MiB each). + +@subsection s3c24xx_mem_generic_map Generic Map +- 0x0000.0000 Start of the internal SRAM when booting from NAND flash memory or CS signal to a NOR flash memory. +- 0x0800.0000 Start of I/O space. +- 0x3000.0000 Start of SDRAM area. + - 0x3000.0100 Start of the TAG list area. + - 0x3000.8000 Start of the linux kernel (physical address). +- 0x4000.0000 Start of internal SRAM, when booting from NOR flash memory +- 0x4800.0000 Start of the internal I/O area + +@section s3c24xx_asm_arm include/asm-arm/arch-s3c24xx directory guidelines +All S3C24xx common headers are located here. + +@note Do not add board specific header files/information here. +*/ + +/** @page dev_s3c24xx_mach Samsung's S3C24xx based platforms + +@par barebox Map + +The location of the @a barebox itself depends on the available amount of +installed SDRAM memory: + +- 0x30fc.0000 Start of @a barebox when 16MiB SDRAM is available +- 0x31fc.0000 Start of @a barebox when 32MiB SDRAM is available +- 0x33fc.0000 Start of @a barebox when 64MiB SDRAM is available + +Adjust the @p CONFIG_TEXT_BASE/CONFIG_ARCH_TEXT_BASE symbol in accordance to +the available memory. + +@note The RAM based filesystem and the stack resides always below the +@a barebox start address. + +@li @subpage dev_s3c24xx_wd_handling +@li @subpage dev_s3c24xx_pll_handling +@li @subpage dev_s3c24xx_sdram_handling +@li @subpage dev_s3c24xx_nandboot_handling +*/ |