summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorMarcin Niestroj <m.niestroj@grinn-global.com>2019-02-26 14:05:29 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2019-03-07 08:22:45 +0100
commit006bdf82d29e7bd31e6ffb8a0ef9cbcc66625af3 (patch)
tree78a3d2c14f90bf1e2331f0d331c1de8ac36974d1 /arch
parent48562aeaa87ec08b961242f18cc37c12884b6382 (diff)
downloadbarebox-006bdf82d29e7bd31e6ffb8a0ef9cbcc66625af3.tar.gz
barebox-006bdf82d29e7bd31e6ffb8a0ef9cbcc66625af3.tar.xz
ARM: i.MX6UL: liteSOM: depend on DDR controller settings
Initially we depended on DDR controller settings for liteSOM and liteboard. With 33fdc89d4cbd ("dts: update to v5.0-rc1") a `device_type = "memory";` property was added to imx6ul-litesom.dtsi file, which causes "ram0" to be added with 512MB size (value in dtsi) instead of the real 256MB size that is configured in barebox-grinn-liteboard-256mb.img. As a result Linux kernel fails to boot. Lets depend on DDR controller settings, by removing whole `/memory` node from device tree. This makes barebox-grinn-liteboard-256mb.img able to boot Linux kernel once again. Reported-by: Bartosz Bilas <b.bilas@grinn-global.com> Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/imx6ul-liteboard.dts1
-rw-r--r--arch/arm/dts/imx6ul-litesom.dtsi8
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6ul-liteboard.dts b/arch/arm/dts/imx6ul-liteboard.dts
index 03a4bfc784..eb34e11ddb 100644
--- a/arch/arm/dts/imx6ul-liteboard.dts
+++ b/arch/arm/dts/imx6ul-liteboard.dts
@@ -42,6 +42,7 @@
*/
#include <arm/imx6ul-liteboard.dts>
+#include "imx6ul-litesom.dtsi"
/ {
chosen {
diff --git a/arch/arm/dts/imx6ul-litesom.dtsi b/arch/arm/dts/imx6ul-litesom.dtsi
new file mode 100644
index 0000000000..8b73bfdd6f
--- /dev/null
+++ b/arch/arm/dts/imx6ul-litesom.dtsi
@@ -0,0 +1,8 @@
+/*
+ * Include file to switch board DTS from using hardcoded memory node
+ * to dynamic memory size detection based on DDR controller settings
+ */
+
+/ {
+ /delete-node/ memory@80000000;
+};