Merge branch 'for-next/imx'

30 files changed, 102 insertions, 301 deletions

diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c
index f023d70c28..d1d020e762 100644
--- a/arch/arm/boards/efika-mx-smartbook/board.c
+++ b/arch/arm/boards/efika-mx-smartbook/board.c
@@ -32,7 +32,6 @@
 
 #include <asm/armlinux.h>
 
-#include <mach/imx-flash-header.h>
 #include <mach/devices-imx51.h>
 #include <mach/imx51-regs.h>
 #include <mach/iomux-mx51.h>
diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index 4ab5b957c4..22bf7409a2 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -38,7 +38,6 @@
 #include <mach/iim.h>
 #include <fec.h>
 #include <nand.h>
-#include <mach/imx-flash-header.h>
 #include <mach/iomux-mx25.h>
 #include <i2c/i2c.h>
 #include <usb/fsl_usb2.h>
diff --git a/arch/arm/boards/freescale-mx25-3ds/3stack.c b/arch/arm/boards/freescale-mx25-3ds/3stack.c
index f0000101dc..6d0e38205a 100644
--- a/arch/arm/boards/freescale-mx25-3ds/3stack.c
+++ b/arch/arm/boards/freescale-mx25-3ds/3stack.c
@@ -32,7 +32,6 @@
 #include <mach/imx-nand.h>
 #include <fec.h>
 #include <nand.h>
-#include <mach/imx-flash-header.h>
 #include <mach/iomux-mx25.h>
 #include <mach/generic.h>
 #include <mach/iim.h>
diff --git a/arch/arm/boards/freescale-mx51-babbage/board.c b/arch/arm/boards/freescale-mx51-babbage/board.c
index 6650ff3408..c4acb8ee16 100644
--- a/arch/arm/boards/freescale-mx51-babbage/board.c
+++ b/arch/arm/boards/freescale-mx51-babbage/board.c
@@ -42,7 +42,6 @@
 #include <mach/iomux-mx51.h>
 #include <mach/devices-imx51.h>
 #include <mach/revision.h>
-#include <mach/imx-flash-header.h>
 
 #define MX51_CCM_CACRR 0x10
 
diff --git a/arch/arm/boards/freescale-mx53-qsb/board.c b/arch/arm/boards/freescale-mx53-qsb/board.c
index dd2abb5f5d..f75c9d12cd 100644
--- a/arch/arm/boards/freescale-mx53-qsb/board.c
+++ b/arch/arm/boards/freescale-mx53-qsb/board.c
@@ -32,7 +32,6 @@
 
 #include <generated/mach-types.h>
 
-#include <mach/imx-flash-header.h>
 #include <mach/imx53-regs.h>
 #include <mach/revision.h>
 #include <mach/generic.h>
diff --git a/arch/arm/boards/karo-tx53/board.c b/arch/arm/boards/karo-tx53/board.c
index b8164ca86e..9e65a839ad 100644
--- a/arch/arm/boards/karo-tx53/board.c
+++ b/arch/arm/boards/karo-tx53/board.c
@@ -34,7 +34,6 @@
 #include <mach/imx-nand.h>
 #include <mach/iim.h>
 #include <mach/imx5.h>
-#include <mach/imx-flash-header.h>
 #include <mach/bbu.h>
 
 #include <asm/armlinux.h>
diff --git a/arch/arm/configs/eukrea_cpuimx25_defconfig b/arch/arm/configs/eukrea_cpuimx25_defconfig
index 43580b1faa..5a508dc3f6 100644
--- a/arch/arm/configs/eukrea_cpuimx25_defconfig
+++ b/arch/arm/configs/eukrea_cpuimx25_defconfig
@@ -1,7 +1,5 @@
 CONFIG_ARCH_IMX=y
 CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x40000
-CONFIG_ARCH_IMX_INTERNAL_BOOT=y
-CONFIG_ARCH_IMX_INTERNAL_BOOT_SERIAL=y
 CONFIG_MACH_EUKREA_CPUIMX25=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
diff --git a/arch/arm/configs/tx51stk5_defconfig b/arch/arm/configs/tx51stk5_defconfig
index 1afe378bbb..acde46a512 100644
--- a/arch/arm/configs/tx51stk5_defconfig
+++ b/arch/arm/configs/tx51stk5_defconfig
@@ -5,8 +5,6 @@ CONFIG_ARCH_IMX=y
 CONFIG_CPU_32=y
 CONFIG_CPU_V7=y
 CONFIG_CPU_32v7=y
-CONFIG_ARCH_IMX_INTERNAL_BOOT=y
-CONFIG_ARCH_IMX_INTERNAL_BOOT_NAND=y
 CONFIG_ARCH_IMX51=y
 CONFIG_MACH_TX51=y
 CONFIG_IMX_IIM=y
diff --git a/arch/arm/dts/imx6dl-cm-fx6.dts b/arch/arm/dts/imx6dl-cm-fx6.dts
index 0d96b46bf9..cc426e2a3c 100644
--- a/arch/arm/dts/imx6dl-cm-fx6.dts
+++ b/arch/arm/dts/imx6dl-cm-fx6.dts
@@ -12,8 +12,8 @@
  */
 
 /dts-v1/;
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-cm-fx6.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts b/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts
index bee4c765d7..b6df37f373 100644
--- a/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts
+++ b/arch/arm/dts/imx6dl-dfi-fs700-m60-6s.dts
@@ -14,8 +14,8 @@
 /dts-v1/;
 #endif
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-dfi-fs700-m60.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-eltec-hipercam.dts b/arch/arm/dts/imx6dl-eltec-hipercam.dts
index 592358f0c8..f272e78a59 100644
--- a/arch/arm/dts/imx6dl-eltec-hipercam.dts
+++ b/arch/arm/dts/imx6dl-eltec-hipercam.dts
@@ -1,7 +1,7 @@
 /dts-v1/;
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 
 / {
 	model = "ELTEC HiPerCam";
diff --git a/arch/arm/dts/imx6dl-nitrogen6x.dts b/arch/arm/dts/imx6dl-nitrogen6x.dts
index 3ac9ff3a0d..50267b1038 100644
--- a/arch/arm/dts/imx6dl-nitrogen6x.dts
+++ b/arch/arm/dts/imx6dl-nitrogen6x.dts
@@ -12,8 +12,8 @@
  */
 
 /dts-v1/;
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-nitrogen6x.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-phytec-pfla02.dtsi b/arch/arm/dts/imx6dl-phytec-pfla02.dtsi
index e0541e00a9..d951c0bb8d 100644
--- a/arch/arm/dts/imx6dl-phytec-pfla02.dtsi
+++ b/arch/arm/dts/imx6dl-phytec-pfla02.dtsi
@@ -9,8 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-phytec-pfla02.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-sabrelite.dts b/arch/arm/dts/imx6dl-sabrelite.dts
index 907ed282b7..849bcdd61a 100644
--- a/arch/arm/dts/imx6dl-sabrelite.dts
+++ b/arch/arm/dts/imx6dl-sabrelite.dts
@@ -11,8 +11,8 @@
  */
 
 /dts-v1/;
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-sabrelite.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6dl-tqma6s.dtsi b/arch/arm/dts/imx6dl-tqma6s.dtsi
index 23081eda30..63459ce7ea 100644
--- a/arch/arm/dts/imx6dl-tqma6s.dtsi
+++ b/arch/arm/dts/imx6dl-tqma6s.dtsi
@@ -9,8 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-tqma6x.dtsi"
 
 &iomuxc {
diff --git a/arch/arm/dts/imx6s-phytec-pfla02.dtsi b/arch/arm/dts/imx6s-phytec-pfla02.dtsi
index 25af12f2bc..7ef27fb941 100644
--- a/arch/arm/dts/imx6s-phytec-pfla02.dtsi
+++ b/arch/arm/dts/imx6s-phytec-pfla02.dtsi
@@ -9,8 +9,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 #include "imx6qdl-phytec-pfla02.dtsi"
 
 / {
diff --git a/arch/arm/dts/imx6s-riotboard.dts b/arch/arm/dts/imx6s-riotboard.dts
index e14363f9af..3d0a930c3f 100644
--- a/arch/arm/dts/imx6s-riotboard.dts
+++ b/arch/arm/dts/imx6s-riotboard.dts
@@ -6,8 +6,8 @@
  */
 /dts-v1/;
 
-#include "imx6dl.dtsi"
 #include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
 
 / {
 	model = "RIoTboard Solo";
diff --git a/arch/arm/include/asm/cache-l2x0.h b/arch/arm/include/asm/cache-l2x0.h
index 963dd99f64..9bb245b0be 100644
--- a/arch/arm/include/asm/cache-l2x0.h
+++ b/arch/arm/include/asm/cache-l2x0.h
@@ -56,6 +56,14 @@
 #define L2X0_LINE_TAG			0xF30
 #define L2X0_DEBUG_CTRL			0xF40
 #define L2X0_PREFETCH_CTRL		0xF60
+#define   L2X0_DOUBLE_LINEFILL_EN			(1 << 30)
+#define   L2X0_INSTRUCTION_PREFETCH_EN			(1 << 29)
+#define   L2X0_DATA_PREFETCH_EN				(1 << 28)
+#define   L2X0_DOUBLE_LINEFILL_ON_WRAP_READ_DIS		(1 << 27)
+#define   L2X0_PREFETCH_DROP_EN				(1 << 24)
+#define   L2X0_INCR_DOUBLE_LINEFILL_EN			(1 << 23)
+#define   L2X0_ESCLUSIVE_SEQUENCE_EN			(1 << 21)
+
 #define L2X0_POWER_CTRL			0xF80
 #define   L2X0_DYNAMIC_CLK_GATING_EN	(1 << 1)
 #define   L2X0_STNDBY_MODE_EN		(1 << 0)
diff --git a/arch/arm/include/asm/errata.h b/arch/arm/include/asm/errata.h
index 9525823e4c..98137b557f 100644
--- a/arch/arm/include/asm/errata.h
+++ b/arch/arm/include/asm/errata.h
@@ -77,3 +77,12 @@ static inline void enable_arm_errata_794072_war(void)
 		"mcr	p15, 0, r0, c15, c0, 1\n"
 	);
 }
+
+static inline void enable_arm_errata_845369_war(void)
+{
+	__asm__ __volatile__ (
+		"mrc	p15, 0, r0, c15, c0, 1\n"
+		"orr	r0, r0, #1 << 22\n"
+		"mcr	p15, 0, r0, c15, c0, 1\n"
+	);
+}
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 33ae145193..5b648acbbc 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -39,27 +39,6 @@ config ARCH_TEXT_BASE
 	default 0x4fc00000 if MACH_VARISCITE_MX6
 	default 0x4fc00000 if MACH_PHYTEC_SOM_IMX6
 
-config ARCH_IMX_INTERNAL_BOOT
-	bool "support internal boot mode"
-	depends on ARCH_IMX25 || ARCH_IMX35 || ARCH_IMX51 || ARCH_IMX53 || ARCH_IMX6
-	depends on !HAVE_PBL_MULTI_IMAGES
-	help
-	  i.MX processors support two different boot modes. With the internal
-	  boot mode the boot medium contains a header describing the image to
-	  load. The header also contains a register/value table which can be
-	  used to setup SDRAM. The internal ROM code then initializes SDRAM
-	  using the register/value table, loads the whole barebox image to
-	  SDRAM and starts it. The internal boot mode is available on newer
-	  i.MX processors (i.MX25, i.MX35, i.MX51, i.MX53 and i.MX6), and
-	  supports booting from NOR, NAND, MMC/SD and serial ROMs.
-	  The external boot mode supports booting only from NAND and NOR. With
-	  NOR flash the image is just started in NOR flash. With NAND flash
-	  the NAND controller loads the first 2kbyte from NAND into the NAND
-	  controllers internal SRAM where it is then started. It's the
-	  responsibility of these 2kbyte to load the rest of the boot image.
-	  The external boot mode is supported on older i.MX processors (i.MX1,
-	  i.MX21, i.MX25, i.MX27, i.MX31, i.MX35).
-
 config ARCH_IMX_IMXIMAGE
 	bool
 	default y
@@ -87,37 +66,6 @@ config ARCH_IMX_UNUSED_IRAM_SIZE
        depends on ARCH_IMX_XLOAD
        default 0x16000 if ARCH_IMX51
 
-choice
-	depends on ARCH_IMX_INTERNAL_BOOT
-	prompt "Internal boot source"
-	default ARCH_IMX_INTERNAL_BOOT_NAND
-	help
-	  Determines the location of the header information for internal boot.
-	  0x100 for OneNAND
-	  0x400 for NAND, SD/MMC or Serial ROM
-	  0x1000 for NOR
-
-config ARCH_IMX_INTERNAL_BOOT_NAND
-	bool "NAND, SD/MMC, Serial ROM"
-
-config ARCH_IMX_INTERNAL_BOOT_NOR
-	bool "NOR"
-
-config ARCH_IMX_INTERNAL_BOOT_ONENAND
-	bool "OneNAND"
-
-config ARCH_IMX_INTERNAL_BOOT_SERIAL
-	bool "Serial (read help)"
-	help
-	  Normally the first instruction of the barebox image contains a jump
-	  to the real start of the image which means that you can start it by
-	  jumping to the load address. With serial boot images this is not
-	  possible because the first instruction is occupied by a magic for the
-	  ROM boot code. You can still start this image as a second stage loader,
-	  but you have to add 0x400 to the entry point.
-
-endchoice
-
 config ARCH_IMX_EXTERNAL_BOOT_NAND
 	bool
 	depends on ARCH_IMX25 || ARCH_IMX27 || ARCH_IMX31 || ARCH_IMX35
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 2433d73cb6..af6c4058d7 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -14,6 +14,7 @@
 #include <linux/clkdev.h>
 #include <linux/err.h>
 #include <mach/imx35-regs.h>
+#include <reset_source.h>
 
 #include "clk.h"
 
@@ -95,12 +96,31 @@ static int imx35_ccm_probe(struct device_d *dev)
 	struct arm_ahb_div *aad;
 	unsigned char *hsp_div;
 	void __iomem *base;
+	u32 reg;
 
 	iores = dev_request_mem_resource(dev, 0);
 	if (IS_ERR(iores))
 		return PTR_ERR(iores);
 	base = IOMEM(iores->start);
 
+	/* Check reset source */
+	reg = readl(base + CCM_RCSR);
+
+	switch (reg & 0x0F) {
+	case 0x00:
+		reset_source_set_priority(RESET_POR, 200);
+		break;
+	case 0x02:
+		reset_source_set_priority(RESET_JTAG, 200);
+		break;
+	case 0x04:
+		reset_source_set_priority(RESET_RST, 200);
+		break;
+	case 0x08:
+		reset_source_set_priority(RESET_WDG, 200);
+		break;
+	}
+
 	writel(0xffffffff, base + CCM_CGR0);
 	writel(0xffffffff, base + CCM_CGR1);
 	writel(0xfbffffff, base + CCM_CGR2);
diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c
index daa58018a6..a634580c86 100644
--- a/arch/arm/mach-imx/clk-imx6.c
+++ b/arch/arm/mach-imx/clk-imx6.c
@@ -507,6 +507,7 @@ static int imx6_ccm_probe(struct device_d *dev)
 	clk_data.clk_num = IMX6QDL_CLK_END;
 	of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, &clk_data);
 
+	clk_enable(clks[IMX6QDL_CLK_MMDC_CH0_AXI_PODF]);
 	clk_enable(clks[IMX6QDL_CLK_PLL6_ENET]);
 	clk_enable(clks[IMX6QDL_CLK_SATA_REF_100M]);
 	clk_enable(clks[IMX6QDL_CLK_ENFC_PODF]);
diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
index 8b10e63ade..7603883d8e 100644
--- a/arch/arm/mach-imx/cpu_init.c
+++ b/arch/arm/mach-imx/cpu_init.c
@@ -31,4 +31,5 @@ void imx6_cpu_lowlevel_init(void)
 	enable_arm_errata_751472_war();
 	enable_arm_errata_761320_war();
 	enable_arm_errata_794072_war();
+	enable_arm_errata_845369_war();
 }
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index e633b62993..66ba51cde1 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -171,11 +171,11 @@ static inline unsigned long imx_v4_sdram_size(void __iomem *esdctlbase, int cs)
  * MMDC - found on i.MX6
  */
 
-static inline unsigned long imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
+static inline u64 imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
 {
 	u32 ctlval = readl(mmdcbase + MDCTL);
 	u32 mdmisc = readl(mmdcbase + MDMISC);
-	unsigned long size;
+	u64 size;
 	int rows, cols, width = 2, banks = 8;
 
 	if (cs == 0 && !(ctlval & MMDCx_MDCTL_SDE0))
@@ -201,7 +201,7 @@ static inline unsigned long imx6_mmdc_sdram_size(void __iomem *mmdcbase, int cs)
 	if (mdmisc & MMDCx_MDMISC_DDR_4_BANKS)
 		banks = 4;
 
-	size = (1 << cols) * (1 << rows) * banks * width;
+	size = (u64)(1 << cols) * (1 << rows) * banks * width;
 
 	return size;
 }
diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c
index 821ce660f5..51ec8b8270 100644
--- a/arch/arm/mach-imx/imx-bbu-internal.c
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -30,7 +30,6 @@
 #include <linux/stat.h>
 #include <ioctl.h>
 #include <mach/bbu.h>
-#include <mach/imx-flash-header.h>
 
 #define FLASH_HEADER_OFFSET_MMC		0x400
 
diff --git a/arch/arm/mach-imx/imx6-mmdc.c b/arch/arm/mach-imx/imx6-mmdc.c
index 146df573e4..8f661e3dfe 100644
--- a/arch/arm/mach-imx/imx6-mmdc.c
+++ b/arch/arm/mach-imx/imx6-mmdc.c
@@ -1199,7 +1199,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
 	twtr = ROUND(max(4 * clkper, 7500) / clkper, 1) - 1;
 	trcd = trp;
 	trtp = twtr;
-	cs0_end = 4 * sysinfo->cs_density - 1 + 8;
+	cs0_end = min(4 * sysinfo->cs_density - 1 + 8, 127);
 
 	debug("density:%d Gb (%d Gb per chip)\n",
 	      sysinfo->cs_density, ddr3_cfg->density);
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 0fdd785c6d..ba8fb8964a 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -123,7 +123,8 @@ int imx6_init(void)
 	imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR);
 
 	rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV);
-	switch (rev & 0xff) {
+
+	switch (rev & 0xfff) {
 	case 0x00:
 		mx6_silicon_revision = IMX_CHIP_REV_1_0;
 		break;
@@ -148,16 +149,26 @@ int imx6_init(void)
 		mx6_silicon_revision = IMX_CHIP_REV_1_5;
 		break;
 
+	case 0x100:
+		mx6_silicon_revision = IMX_CHIP_REV_2_0;
+		break;
+
 	default:
 		mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN;
 	}
 
 	switch (imx6_cpu_type()) {
 	case IMX6_CPUTYPE_IMX6Q:
-		cputypestr = "i.MX6 Quad";
+		if (mx6_silicon_revision >= IMX_CHIP_REV_2_0)
+			cputypestr = "i.MX6 Quad Plus";
+		else
+			cputypestr = "i.MX6 Quad";
 		break;
 	case IMX6_CPUTYPE_IMX6D:
-		cputypestr = "i.MX6 Dual";
+		if (mx6_silicon_revision >= IMX_CHIP_REV_2_0)
+			cputypestr = "i.MX6 Dual Plus";
+		else
+			cputypestr = "i.MX6 Dual";
 		break;
 	case IMX6_CPUTYPE_IMX6DL:
 		cputypestr = "i.MX6 DualLite";
@@ -199,15 +210,24 @@ int imx6_devices_init(void)
 static int imx6_mmu_init(void)
 {
 	void __iomem *l2x0_base = IOMEM(0x00a02000);
-	u32 val;
+	u32 val, cache_part, cache_rtl;
 
 	if (!cpu_is_mx6())
 		return 0;
 
+	val = readl(l2x0_base + L2X0_CACHE_ID);
+	cache_part = val & L2X0_CACHE_ID_PART_MASK;
+	cache_rtl  = val & L2X0_CACHE_ID_RTL_MASK;
+
 	/* configure the PREFETCH register */
 	val = readl(l2x0_base + L2X0_PREFETCH_CTRL);
-	val |= 0x70800000;
-
+	val |=  L2X0_DOUBLE_LINEFILL_EN |
+		L2X0_INSTRUCTION_PREFETCH_EN |
+		L2X0_DATA_PREFETCH_EN;
+	/*
+	 * set prefetch offset to 15
+	 */
+	val |= 15;
 	/*
 	 * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
 	 * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
@@ -217,8 +237,9 @@ static int imx6_mmu_init(void)
 	 * Workaround: The only workaround to this erratum is to disable the
 	 * double linefill feature. This is the default behavior.
 	 */
-	if (cpu_is_mx6q())
-		val &= ~(1 << 30 | 1 << 23);
+	if (cache_part == L2X0_CACHE_ID_PART_L310 &&
+	    cache_rtl < L2X0_CACHE_ID_RTL_R3P2)
+		val &= ~L2X0_DOUBLE_LINEFILL_EN;
 
 	writel(val, l2x0_base + L2X0_PREFETCH_CTRL);
 
diff --git a/arch/arm/mach-imx/include/mach/barebox.lds.h b/arch/arm/mach-imx/include/mach/barebox.lds.h
deleted file mode 100644
index 2e60282c6d..0000000000
--- a/arch/arm/mach-imx/include/mach/barebox.lds.h
+++ /dev/null
@@ -1,32 +0,0 @@
-
-#ifdef CONFIG_ARCH_IMX_INTERNAL_BOOT
-
-#ifdef CONFIG_ARCH_IMX_INTERNAL_BOOT_SERIAL
-#define PRE_IMAGE \
-	.pre_image : {					\
-		KEEP(*(.flash_header_0x0*))		\
-		KEEP(*(.dcd_entry_0x0*))		\
-		KEEP(*(.image_len_0x0*))		\
-		. = 0x400;				\
-	}
-#else
-
-#define PRE_IMAGE \
-	.pre_image : {					\
-		KEEP(*(.flash_header_start*))		\
-		. = 0x100;				\
-		KEEP(*(.flash_header_0x0100*))		\
-		KEEP(*(.dcd_entry_0x0100*))		\
-		KEEP(*(.image_len_0x0100*))		\
-		. = 0x400;				\
-		KEEP(*(.flash_header_0x0400*))		\
-		KEEP(*(.dcd_entry_0x0400*))		\
-		KEEP(*(.image_len_0x0400*))		\
-		. = 0x1000;				\
-		KEEP(*(.flash_header_0x1000*))		\
-		KEEP(*(.dcd_entry_0x1000*))		\
-		KEEP(*(.image_len_0x1000*))		\
-		. = 0x2000;				\
-	}
-#endif
-#endif
diff --git a/arch/arm/mach-imx/include/mach/imx-flash-header.h b/arch/arm/mach-imx/include/mach/imx-flash-header.h
deleted file mode 100644
index 7a8d5cc306..0000000000
--- a/arch/arm/mach-imx/include/mach/imx-flash-header.h
+++ /dev/null
@@ -1,182 +0,0 @@
-#ifndef __MACH_FLASH_HEADER_H
-#define __MACH_FLASH_HEADER_H
-
-#include <asm/sections.h>
-
-#define __flash_header_start		__section(.flash_header_start)
-
-#if defined(CONFIG_ARCH_IMX_INTERNAL_BOOT_NOR)
-	#define __flash_header_section		__section(.flash_header_0x1000)
-	#define __dcd_entry_section		__section(.dcd_entry_0x1000)
-	#define __image_len_section		__section(.image_len_0x1000)
-	#define FLASH_HEADER_OFFSET 0x1000
-#elif defined(CONFIG_ARCH_IMX_INTERNAL_BOOT_ONENAND)
-	#define __flash_header_section		__section(.flash_header_0x0100)
-	#define __dcd_entry_section		__section(.dcd_entry_0x0100)
-	#define __image_len_section		__section(.image_len_0x0100)
-	#define FLASH_HEADER_OFFSET 0x0100
-#elif defined(CONFIG_ARCH_IMX_INTERNAL_BOOT_SERIAL)
-	#define __flash_header_section		__section(.flash_header_0x0)
-	#define __dcd_entry_section		__section(.dcd_entry_0x0)
-	#define __image_len_section		__section(.image_len_0x0)
-	#define FLASH_HEADER_OFFSET 0x0
-#else
-	#define __flash_header_section		__section(.flash_header_0x0400)
-	#define __dcd_entry_section		__section(.dcd_entry_0x0400)
-	#define __image_len_section		__section(.image_len_0x0400)
-	#define FLASH_HEADER_OFFSET 0x0400
-#endif
-
-#define __flash_header_0x1000	__section(.flash_header_0x1000)
-#define __dcd_entry_0x1000	__section(.dcd_entry_0x1000)
-#define __image_len_0x1000	__section(.image_len_0x1000)
-
-#define __flash_header_0x0100	__section(.flash_header_0x0100)
-#define __dcd_entry_0x0100	__section(.dcd_entry_0x0100)
-#define __image_len_0x0100	__section(.image_len_0x0100)
-
-#define __flash_header_0x0400	__section(.flash_header_0x0400)
-#define __dcd_entry_0x0400	__section(.dcd_entry_0x0400)
-#define __image_len_0x0400	__section(.image_len_0x0400)
-
-#define __flash_header_0x0	__section(.flash_header_0x0)
-#define __dcd_entry_0x0		__section(.dcd_entry_0x0)
-#define __image_len_0x0		__section(.image_len_0x0)
-
-/*
- * NOR is not automatically copied anywhere by the boot ROM
- */
-#if defined (CONFIG_ARCH_IMX_INTERNAL_BOOT_NOR)
-	#define DEST_BASE	IMX_CS0_BASE
-#else
-	#define DEST_BASE	TEXT_BASE
-#endif
-
-#define FLASH_HEADER_BASE	(DEST_BASE + FLASH_HEADER_OFFSET)
-
-struct imx_dcd_entry {
-	unsigned long ptr_type;
-	unsigned long addr;
-	unsigned long val;
-};
-
-struct imx_dcd_v2_entry {
-	__be32 addr;
-	__be32 val;
-};
-
-#define DCD_BARKER	0xb17219e9
-
-struct imx_rsa_public_key {
-	unsigned char	rsa_exponent[4];
-	unsigned char	*rsa_modululs;
-	unsigned short	*exponent_size;
-	unsigned short	modulus_size;
-	unsigned char	init_flag;
-};
-
-#define APP_CODE_BARKER	0x000000b1
-
-struct imx_flash_header {
-	unsigned long			app_code_jump_vector;
-	unsigned long			app_code_barker;
-	unsigned long			app_code_csf;
-	unsigned long			dcd_ptr_ptr;
-	unsigned long			super_root_key;
-	unsigned long			dcd;
-	unsigned long			app_dest;
-	unsigned long			dcd_barker;
-	unsigned long			dcd_block_len;
-};
-
-#define IVT_HEADER_TAG		0xd1
-#define IVT_VERSION		0x40
-
-#define DCD_HEADER_TAG		0xd2
-#define DCD_VERSION		0x40
-
-#define DCD_COMMAND_WRITE_TAG	0xcc
-#define DCD_COMMAND_WRITE_PARAM	0x04
-
-/*
- * At least on i.MX5 the ROM copies only full blocks. Unfortunately
- * it does not round up to the next full block, we have to do it
- * ourselves. Use 4095 which should be enough for the largest NAND
- * pages.
- */
-#define DCD_BAREBOX_SIZE	(barebox_image_size + 4095)
-
-struct imx_ivt_header {
-	uint8_t tag;
-	__be16 length;
-	uint8_t version;
-} __attribute__((packed));
-
-struct imx_dcd_command {
-	uint8_t tag;
-	__be16 length;
-	uint8_t param;
-} __attribute__((packed));
-
-struct imx_dcd {
-	struct imx_ivt_header header;
-#ifndef IMX_INTERNAL_NAND_BBU
-	struct imx_dcd_command command;
-#endif
-};
-
-struct imx_boot_data {
-	uint32_t start;
-	uint32_t size;
-	uint32_t plugin;
-};
-
-struct imx_flash_header_v2 {
-	struct imx_ivt_header header;
-
-	uint32_t entry;
-	uint32_t reserved1;
-	uint32_t dcd_ptr;
-	uint32_t boot_data_ptr;
-	uint32_t self;
-	uint32_t csf;
-	uint32_t reserved2;
-
-	struct imx_boot_data boot_data;
-	struct imx_dcd dcd;
-};
-
-/*
- * A variant of the standard barebox header in the i.MX FCB
- * format. Needed for i.MX53 NAND boot
- */
-static inline void barebox_arm_imx_fcb_head(void)
-{
-	__asm__ __volatile__ (
-		".arm\n"
-		"	b 1f\n"
-		".word 0x20424346\n" /* FCB */
-		".word 0x1\n"
-#ifdef CONFIG_THUMB2_BAREBOX
-		"1:	adr r9, 1f + 1\n"
-		"	bx r9\n"
-		".thumb\n"
-		"1:\n"
-		"bl	barebox_arm_reset_vector\n"
-#else
-		"1:	b barebox_arm_reset_vector\n"
-		".word 0x0\n"
-		".word 0x0\n"
-#endif
-		".word 0x0\n"
-		".word 0x0\n"
-
-		".asciz \"barebox\"\n"
-		".word _text\n"				/* text base. If copied there,
-							 * barebox can skip relocation
-							 */
-		".word _barebox_image_size\n"		/* image size to copy */
-	);
-}
-
-#endif /* __MACH_FLASH_HEADER_H */
diff --git a/arch/arm/mach-imx/xload-esdhc.c b/arch/arm/mach-imx/xload-esdhc.c
index 6479ce0153..e774e4e68c 100644
--- a/arch/arm/mach-imx/xload-esdhc.c
+++ b/arch/arm/mach-imx/xload-esdhc.c
@@ -1,3 +1,14 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
 #define pr_fmt(fmt) "xload-esdhc: " fmt
 
 #include <common.h>
@@ -240,7 +251,7 @@ int imx6_esdhc_load_image(int instance, void *buf, int len)
  * (This information is used to calculate the length of the image). The
  * image is started afterwards.
  *
- * Return: If successul, this function does not return. A negative error
+ * Return: If successful, this function does not return. A negative error
  * code is returned when this function fails.
  */
 int imx6_esdhc_start_image(int instance)
@@ -249,6 +260,7 @@ int imx6_esdhc_start_image(int instance)
 	u32 *ivt = buf + SZ_1K;
 	int ret, len;
 	void __noreturn (*bb)(void);
+	unsigned int ofs;
 
 	len = imx_image_size();
 	len = ALIGN(len, SECTOR_SIZE);
@@ -265,10 +277,16 @@ int imx6_esdhc_start_image(int instance)
 	pr_debug("Check ok, loading image\n");
 
 	ret = imx6_esdhc_load_image(instance, buf, len);
-	if (ret)
+	if (ret) {
+		pr_err("Loading image failed with %d\n", ret);
 		return ret;
+	}
+
+	pr_debug("Image loaded successfully\n");
+
+	ofs = *(ivt + 1) - *(ivt + 8);
 
-	bb = buf;
+	bb = buf + ofs;
 
 	bb();
 }