summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-01-10 08:31:14 -0800
committerSascha Hauer <s.hauer@pengutronix.de>2018-01-11 09:43:10 +0100
commit210376ccf66850b2ea4c6fb959f881bd59f31493 (patch)
tree9d898dd69f72ce0d624bd25f93026864e16c2b38 /arch
parent71022518228aa22a44d672d01a2f82c136e70c20 (diff)
downloadbarebox-210376ccf66850b2ea4c6fb959f881bd59f31493.tar.gz
barebox-210376ccf66850b2ea4c6fb959f881bd59f31493.tar.xz
i.MX: Fix MX7_UART2_BASE_ADDR
Despite what the Reference Manual says, experiment on i.MX7 SabreSD shows that that UART2's base is located at offset 0x90000. This is also corroborated by the offset used in dts/src/arm/imx7s.dtsi in uart2. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/include/mach/imx7-regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/include/mach/imx7-regs.h b/arch/arm/mach-imx/include/mach/imx7-regs.h
index 8774c32d73..8625d0b619 100644
--- a/arch/arm/mach-imx/include/mach/imx7-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx7-regs.h
@@ -78,7 +78,7 @@
#define MX7_ECSPI2_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0x30000)
#define MX7_ECSPI3_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0x40000)
#define MX7_UART1_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0x60000)
-#define MX7_UART2_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0x70000)
+#define MX7_UART2_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0x90000)
#define MX7_UART3_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0x80000)
#define MX7_SAI1_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0xA0000)
#define MX7_SAI2_BASE_ADDR (MX7_AIPS3_BASE_ADDR + 0xB0000)