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authorAlexander Kurz <akurz@blala.de>2018-05-14 05:26:49 +0000
committerSascha Hauer <s.hauer@pengutronix.de>2018-05-14 09:53:42 +0200
commit2aa1fa7ba0980d813f02b54dad85ca6f7a2f7a68 (patch)
tree3baecb40e9ba3bb2da75bba50f800119899510cf /arch
parent023547c81215961ab5f2be39e25ddcdd7e1c2de8 (diff)
downloadbarebox-2aa1fa7ba0980d813f02b54dad85ca6f7a2f7a68.tar.gz
barebox-2aa1fa7ba0980d813f02b54dad85ca6f7a2f7a68.tar.xz
ARM: i.MX50: Replace expicit casts with IOMEM
Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/imx50.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/imx50.c b/arch/arm/mach-imx/imx50.c
index d6ff6dfc2d..6d121eaf8d 100644
--- a/arch/arm/mach-imx/imx50.c
+++ b/arch/arm/mach-imx/imx50.c
@@ -83,7 +83,7 @@ int imx50_devices_init(void)
void imx50_init_lowlevel_early(unsigned int cpufreq_mhz)
{
- void __iomem *ccm = (void __iomem *)MX50_CCM_BASE_ADDR;
+ void __iomem *ccm = IOMEM(MX50_CCM_BASE_ADDR);
u32 r;
imx5_init_lowlevel();
@@ -113,11 +113,11 @@ void imx50_init_lowlevel_early(unsigned int cpufreq_mhz)
writel(0x4, ccm + MX5_CCM_CCSR);
if (cpufreq_mhz == 400)
- imx5_setup_pll_400((void __iomem *)MX50_PLL1_BASE_ADDR);
+ imx5_setup_pll_400(IOMEM(MX50_PLL1_BASE_ADDR));
else
- imx5_setup_pll_800((void __iomem *)MX50_PLL1_BASE_ADDR);
+ imx5_setup_pll_800(IOMEM(MX50_PLL1_BASE_ADDR));
- imx5_setup_pll_216((void __iomem *)MX50_PLL3_BASE_ADDR);
+ imx5_setup_pll_216(IOMEM(MX50_PLL3_BASE_ADDR));
/* Switch peripheral to PLL3 */
writel(0x00015154, ccm + MX5_CCM_CBCMR);
@@ -126,7 +126,7 @@ void imx50_init_lowlevel_early(unsigned int cpufreq_mhz)
/* make sure change is effective */
while (readl(ccm + MX5_CCM_CDHIPR));
- imx5_setup_pll_400((void __iomem *)MX50_PLL2_BASE_ADDR);
+ imx5_setup_pll_400(IOMEM(MX50_PLL2_BASE_ADDR));
/* Switch peripheral to PLL2 */
r = 0x02800145 |