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authorDmitry Lavnikevich <d.lavnikevich@sam-solutions.com>2014-11-21 16:35:06 +0300
committerSascha Hauer <s.hauer@pengutronix.de>2014-11-24 13:42:26 +0100
commit36d08119e9d96fe9f730cf4a86e6de6068bc91a4 (patch)
treefac0cfc413d693c2e48eabba998872bcd635cf71 /arch
parent074960339ee81a337592c8db5c4ebf4e312a9d91 (diff)
downloadbarebox-36d08119e9d96fe9f730cf4a86e6de6068bc91a4.tar.gz
barebox-36d08119e9d96fe9f730cf4a86e6de6068bc91a4.tar.xz
ARM i.MX: add 2-bit gate clock support
Based on kernel clk-gate2 and barebox clk-gate implementations. Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/Makefile2
-rw-r--r--arch/arm/mach-imx/clk-gate2.c142
-rw-r--r--arch/arm/mach-imx/clk.h9
3 files changed, 152 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 1d311a4177..b811c13bf4 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_IMX_IIM) += iim.o
obj-$(CONFIG_IMX_OCOTP) += ocotp.o
obj-$(CONFIG_NAND_IMX) += nand.o
lwl-$(CONFIG_ARCH_IMX_EXTERNAL_BOOT_NAND) += external-nand-boot.o
-obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-pfd.o
+obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-pfd.o clk-gate2.o
obj-y += devices.o imx.o esdctl.o
obj-y += boot.o
obj-$(CONFIG_BAREBOX_UPDATE) += imx-bbu-internal.o
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
new file mode 100644
index 0000000000..344c2fb1e6
--- /dev/null
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -0,0 +1,142 @@
+/*
+ * clk-gate2.c - barebox 2-bit clock support. Based on Linux clk support
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <io.h>
+#include <malloc.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include "clk.h"
+
+
+struct clk_gate2 {
+ struct clk clk;
+ void __iomem *reg;
+ int shift;
+ const char *parent;
+#define CLK_GATE_INVERTED (1 << 0)
+ unsigned flags;
+};
+
+#define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
+
+static int clk_gate2_enable(struct clk *clk)
+{
+ struct clk_gate2 *g = to_clk_gate2(clk);
+ u32 val;
+
+ val = readl(g->reg);
+
+ if (g->flags & CLK_GATE_INVERTED)
+ val &= ~(3 << g->shift);
+ else
+ val |= 3 << g->shift;
+
+ writel(val, g->reg);
+
+ return 0;
+}
+
+static void clk_gate2_disable(struct clk *clk)
+{
+ struct clk_gate2 *g = to_clk_gate2(clk);
+ u32 val;
+
+ val = readl(g->reg);
+
+ if (g->flags & CLK_GATE_INVERTED)
+ val |= 3 << g->shift;
+ else
+ val &= ~(3 << g->shift);
+
+ writel(val, g->reg);
+}
+
+static int clk_gate2_is_enabled(struct clk *clk)
+{
+ struct clk_gate2 *g = to_clk_gate2(clk);
+ u32 val;
+
+ val = readl(g->reg);
+
+ if (val & (1 << g->shift))
+ return g->flags & CLK_GATE_INVERTED ? 0 : 1;
+ else
+ return g->flags & CLK_GATE_INVERTED ? 1 : 0;
+}
+
+static struct clk_ops clk_gate2_ops = {
+ .enable = clk_gate2_enable,
+ .disable = clk_gate2_disable,
+ .is_enabled = clk_gate2_is_enabled,
+};
+
+struct clk *clk_gate2_alloc(const char *name, const char *parent,
+ void __iomem *reg, u8 shift)
+{
+ struct clk_gate2 *g = xzalloc(sizeof(*g));
+
+ g->parent = parent;
+ g->reg = reg;
+ g->shift = shift;
+ g->clk.ops = &clk_gate2_ops;
+ g->clk.name = name;
+ g->clk.parent_names = &g->parent;
+ g->clk.num_parents = 1;
+
+ return &g->clk;
+}
+
+void clk_gate2_free(struct clk *clk)
+{
+ struct clk_gate2 *g = to_clk_gate2(clk);
+
+ free(g);
+}
+
+struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
+ u8 shift)
+{
+ struct clk *g;
+ int ret;
+
+ g = clk_gate2_alloc(name , parent, reg, shift);
+
+ ret = clk_register(g);
+ if (ret) {
+ free(to_clk_gate2(g));
+ return ERR_PTR(ret);
+ }
+
+ return g;
+}
+
+struct clk *clk_gate2_inverted(const char *name, const char *parent,
+ void __iomem *reg, u8 shift)
+{
+ struct clk *clk;
+ struct clk_gate2 *g;
+
+ clk = clk_gate2(name, parent, reg, shift);
+ if (IS_ERR(clk))
+ return clk;
+
+ g = to_clk_gate2(clk);
+
+ g->flags = CLK_GATE_INVERTED;
+
+ return clk;
+}
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index e2f4143879..8ec3eb5430 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -1,6 +1,9 @@
#ifndef __IMX_CLK_H
#define __IMX_CLK_H
+struct clk *clk_gate2(const char *name, const char *parent, void __iomem *reg,
+ u8 shift);
+
static inline struct clk *imx_clk_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width)
{
@@ -39,6 +42,12 @@ static inline struct clk *imx_clk_gate(const char *name, const char *parent,
return clk_gate(name, parent, reg, shift, CLK_SET_RATE_PARENT, 0);
}
+static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
+ void __iomem *reg, u8 shift)
+{
+ return clk_gate2(name, parent, reg, shift);
+}
+
struct clk *imx_clk_pllv1(const char *name, const char *parent,
void __iomem *base);