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authorJan Weitzel <j.weitzel@phytec.de>2013-05-28 13:51:40 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-06-08 15:12:56 +0200
commit48e84969508dd18df1fb2c1c9cbef1bb74943e5f (patch)
treed786843d67b9c402c08ee1e905351ab00f5b42b5 /arch
parent699bcc94167467f33c204db0a8c7f086729c523f (diff)
downloadbarebox-48e84969508dd18df1fb2c1c9cbef1bb74943e5f.tar.gz
barebox-48e84969508dd18df1fb2c1c9cbef1bb74943e5f.tar.xz
OMAP4: Use default clock source for mcbsp
In omap4_enable_all_clocks we not only enable the mcbsp clocks, but also change the source from ABE_24M_FCLK to 24M_FCLK. Revert this and default to the reset state. Signed-off-by: Jan Weitzel <j.weitzel@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap/omap4_clock.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 0621fd3cec..889d1f9254 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -253,9 +253,9 @@ void omap4_enable_all_clocks(void)
sr32(CM1_ABE_PDM_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_DMIC_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_MCASP_CLKCTRL, 0, 32, 0x2);
- sr32(CM1_ABE_MCBSP1_CLKCTRL, 0, 32, 0x08000002);
- sr32(CM1_ABE_MCBSP2_CLKCTRL, 0, 32, 0x08000002);
- sr32(CM1_ABE_MCBSP3_CLKCTRL, 0, 32, 0x08000002);
+ sr32(CM1_ABE_MCBSP1_CLKCTRL, 0, 32, 0x2);
+ sr32(CM1_ABE_MCBSP2_CLKCTRL, 0, 32, 0x2);
+ sr32(CM1_ABE_MCBSP3_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_SLIMBUS_CLKCTRL, 0, 32, 0xf02);
sr32(CM1_ABE_TIMER5_CLKCTRL, 0, 32, 0x2);
sr32(CM1_ABE_TIMER6_CLKCTRL, 0, 32, 0x2);