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| author | Alexander Aring <alex.aring@gmail.com> | 2013-01-25 01:59:43 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-01-25 19:51:06 +0100 |
| commit | 56f99ec44a7253ae5f010be978fd8f205c066625 (patch) | |
| tree | 73e9afe80900c721a480afbfdefc962e57581903 /arch | |
| parent | b1da925c8a8ab9145cbbc3d9359f8d81881b261d (diff) | |
| download | barebox-56f99ec44a7253ae5f010be978fd8f205c066625.tar.gz barebox-56f99ec44a7253ae5f010be978fd8f205c066625.tar.xz | |
arm-mmu: switch pte flags vars to lower case
Old cache/uncache pte flags were declared as defines.
Since these flags are determine at runtime they are static
variables.
This patch switch the naming style of these variables to
lower case which is typically used for variables.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/mmu.c | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 6e24356221..7b5f4eeebb 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -56,19 +56,19 @@ extern int arm_architecture; * PTE flags to set cached and uncached areas. * This will be determined at runtime. */ -static uint32_t PTE_FLAGS_CACHED; -static uint32_t PTE_FLAGS_UNCACHED; +static uint32_t pte_flags_cached; +static uint32_t pte_flags_uncached; #define PTE_MASK ((1 << 12) - 1) uint32_t mmu_get_pte_cached_flags() { - return PTE_FLAGS_CACHED; + return pte_flags_cached; } uint32_t mmu_get_pte_uncached_flags() { - return PTE_FLAGS_UNCACHED; + return pte_flags_uncached; } /* @@ -86,7 +86,7 @@ static u32 *arm_create_pte(unsigned long virt) ttb[virt >> 20] = (unsigned long)table | PMD_TYPE_TABLE; for (i = 0; i < 256; i++) { - table[i] = virt | PTE_TYPE_SMALL | PTE_FLAGS_UNCACHED; + table[i] = virt | PTE_TYPE_SMALL | pte_flags_uncached; virt += PAGE_SIZE; } @@ -169,7 +169,7 @@ static int arm_mmu_remap_sdram(struct memory_bank *bank) for (i = 0; i < num_ptes; i++) { ptes[i] = (phys + i * 4096) | PTE_TYPE_SMALL | - PTE_FLAGS_CACHED; + pte_flags_cached; } pte = 0; @@ -231,9 +231,10 @@ static void vectors_init(void) memcpy(vectors, __exceptions_start, __exceptions_stop - __exceptions_start); if (cr & CR_V) - exc[256 - 16] = (u32)vectors | PTE_TYPE_SMALL | PTE_FLAGS_CACHED; + exc[256 - 16] = (u32)vectors | PTE_TYPE_SMALL | + pte_flags_cached; else - exc[0] = (u32)vectors | PTE_TYPE_SMALL | PTE_FLAGS_CACHED; + exc[0] = (u32)vectors | PTE_TYPE_SMALL | pte_flags_cached; } /* @@ -247,11 +248,11 @@ static int mmu_init(void) arm_set_cache_functions(); if (cpu_architecture() >= CPU_ARCH_ARMv7) { - PTE_FLAGS_CACHED = PTE_FLAGS_CACHED_V7; - PTE_FLAGS_UNCACHED = PTE_FLAGS_UNCACHED_V7; + pte_flags_cached = PTE_FLAGS_CACHED_V7; + pte_flags_uncached = PTE_FLAGS_UNCACHED_V7; } else { - PTE_FLAGS_CACHED = PTE_FLAGS_CACHED_V4; - PTE_FLAGS_UNCACHED = PTE_FLAGS_UNCACHED_V4; + pte_flags_cached = PTE_FLAGS_CACHED_V4; + pte_flags_uncached = PTE_FLAGS_UNCACHED_V4; } ttb = memalign(0x10000, 0x4000); @@ -317,7 +318,7 @@ void *dma_alloc_coherent(size_t size) dma_inv_range((unsigned long)ret, (unsigned long)ret + size); - remap_range(ret, size, PTE_FLAGS_UNCACHED); + remap_range(ret, size, pte_flags_uncached); return ret; } @@ -334,7 +335,7 @@ void *phys_to_virt(unsigned long phys) void dma_free_coherent(void *mem, size_t size) { - remap_range(mem, size, PTE_FLAGS_CACHED); + remap_range(mem, size, pte_flags_cached); free(mem); } |