Merge branch 'for-next/mvebu'

14 files changed, 179 insertions, 20 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 35aa9a2f52..d6fc17cc25 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_MACH_HIGHBANK)			+= highbank/
 obj-$(CONFIG_MACH_IMX21ADS)			+= freescale-mx21-ads/
 obj-$(CONFIG_MACH_IMX233_OLINUXINO)		+= imx233-olinuxino/
 obj-$(CONFIG_MACH_IMX27ADS)			+= freescale-mx27-ads/
+obj-$(CONFIG_MACH_LENOVO_IX4_300D)		+= lenovo-ix4-300d/
 obj-$(CONFIG_MACH_LUBBOCK)			+= lubbock/
 obj-$(CONFIG_MACH_MAINSTONE)			+= mainstone/
 obj-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP)		+= marvell-armada-xp-gp/
diff --git a/arch/arm/boards/lenovo-ix4-300d/Makefile b/arch/arm/boards/lenovo-ix4-300d/Makefile
new file mode 100644
index 0000000000..b08c4a93ca
--- /dev/null
+++ b/arch/arm/boards/lenovo-ix4-300d/Makefile
@@ -0,0 +1 @@
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/lenovo-ix4-300d/kwbimage.cfg b/arch/arm/boards/lenovo-ix4-300d/kwbimage.cfg
new file mode 100644
index 0000000000..713efb0b0a
--- /dev/null
+++ b/arch/arm/boards/lenovo-ix4-300d/kwbimage.cfg
@@ -0,0 +1,5 @@
+VERSION 1
+BOOT_FROM nand
+NAND_BLKSZ 00020000
+NAND_BADBLK_LOCATION 00
+BINARY arch/arm/boards/lenovo-ix4-300d/binary.0 0000005b 00000068
diff --git a/arch/arm/boards/lenovo-ix4-300d/lowlevel.c b/arch/arm/boards/lenovo-ix4-300d/lowlevel.c
new file mode 100644
index 0000000000..8cb8bd4079
--- /dev/null
+++ b/arch/arm/boards/lenovo-ix4-300d/lowlevel.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2014, 2015
+ *  Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <asm/barebox-arm.h>
+#include <asm/barebox-arm-head.h>
+#include <linux/sizes.h>
+#include <mach/lowlevel.h>
+
+extern char __dtb_armada_xp_lenovo_ix4_300d_bb_start[];
+
+ENTRY_FUNCTION(start_lenovo_ix4_300d, r0, r1, r2)
+{
+	void *fdt;
+
+	arm_cpu_lowlevel_init();
+
+	fdt = __dtb_armada_xp_lenovo_ix4_300d_bb_start -
+		get_runtime_offset();
+
+	mvebu_barebox_entry(fdt);
+}
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index 9309084cdc..6d1b021768 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -1,7 +1,8 @@
 CONFIG_ARCH_MVEBU=y
 CONFIG_MACH_GLOBALSCALE_MIRABOX=y
-CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3=y
+CONFIG_MACH_LENOVO_IX4_300D=y
 CONFIG_MACH_MARVELL_ARMADA_XP_GP=y
+CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3=y
 CONFIG_MACH_SOLIDRUN_CUBOX=y
 CONFIG_MACH_GLOBALSCALE_GURUPLUG=y
 CONFIG_MACH_USI_TOPKICK=y
@@ -90,6 +91,7 @@ CONFIG_OF_BAREBOX_DRIVERS=y
 CONFIG_DRIVER_SERIAL_NS16550=y
 CONFIG_DRIVER_NET_ORION=y
 CONFIG_MARVELL_PHY=y
+CONFIG_DRIVER_SPI_GPIO=y
 CONFIG_DRIVER_SPI_MVEBU=y
 CONFIG_I2C=y
 CONFIG_I2C_MV64XXX=y
@@ -111,6 +113,7 @@ CONFIG_LED_TRIGGERS=y
 CONFIG_EEPROM_AT25=y
 CONFIG_KEYBOARD_GPIO=y
 CONFIG_WATCHDOG=y
+CONFIG_GPIO_74164=y
 CONFIG_GPIO_ORION=y
 CONFIG_PCI_MVEBU=y
 CONFIG_FS_CRAMFS=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cc92bdef83..06c29c8d80 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -23,6 +23,7 @@ pbl-dtb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += kirkwood-guruplug-server-plus-bb.
 pbl-dtb-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += armada-370-mirabox-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o
 pbl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o
+pbl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o
 pbl-dtb-$(CONFIG_MACH_NITROGEN6X) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o
 pbl-dtb-$(CONFIG_MACH_NVIDIA_BEAVER) += tegra30-beaver.dtb.o
diff --git a/arch/arm/dts/armada-xp-lenovo-ix4-300d-bb.dts b/arch/arm/dts/armada-xp-lenovo-ix4-300d-bb.dts
new file mode 100644
index 0000000000..5f1a607381
--- /dev/null
+++ b/arch/arm/dts/armada-xp-lenovo-ix4-300d-bb.dts
@@ -0,0 +1,14 @@
+/*
+ * Barebox specific DT overlay for Lenovo Iomega ix4-300d
+ *   Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+ */
+
+#include "arm/armada-xp-lenovo-ix4-300d.dts"
+
+/ {
+	gpio-leds {
+		power-led {
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 8323b66041..5e96f16e8c 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -43,14 +43,18 @@ config MACH_GLOBALSCALE_MIRABOX
 
 comment "Armada XP based boards"
 
-config MACH_PLATHOME_OPENBLOCKS_AX3
-	bool "PlatHome OpenBlocks AX3"
+config MACH_LENOVO_IX4_300D
+	bool "Lenovo Iomega ix4-300d"
 	select ARCH_ARMADA_XP
 
 config MACH_MARVELL_ARMADA_XP_GP
 	bool "Marvell Armada XP GP"
 	select ARCH_ARMADA_XP
 
+config MACH_PLATHOME_OPENBLOCKS_AX3
+	bool "PlatHome OpenBlocks AX3"
+	select ARCH_ARMADA_XP
+
 #
 # Dove 88AP510 SoC boards
 #
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 244f8cdd81..2405629526 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -17,9 +17,12 @@
 #include <common.h>
 #include <init.h>
 #include <io.h>
+#include <of.h>
+#include <of_address.h>
 #include <asm/memory.h>
 #include <linux/mbus.h>
 #include <mach/armada-370-xp-regs.h>
+#include <mach/socid.h>
 
 static inline void armada_370_xp_memory_find(unsigned long *phys_base,
 					     unsigned long *phys_size)
@@ -44,6 +47,63 @@ static inline void armada_370_xp_memory_find(unsigned long *phys_base,
 	}
 }
 
+static const struct of_device_id armada_370_xp_pcie_of_ids[] = {
+	{ .compatible = "marvell,armada-xp-pcie", },
+	{ .compatible = "marvell,armada-370-pcie", },
+	{ },
+};
+
+static int armada_370_xp_soc_id_fixup(void)
+{
+	struct device_node *np, *cnp;
+	void __iomem *base;
+	u32 reg, ctrl, mask;
+	u32 socid, numcpus;
+
+	socid = readl(ARMADA_370_XP_CPU_SOC_ID) & CPU_SOC_ID_DEVICE_MASK;
+	numcpus = 1 + (readl(ARMADA_370_XP_FABRIC_CONF) & FABRIC_NUM_CPUS_MASK);
+
+	switch (socid) {
+	/*
+	 * Marvell Armada XP MV78230-A0 incorrectly identifies itself as
+	 * MV78460. Check for DEVID_MV78460 but if there are only 2 CPUs
+	 * present in Coherency Fabric, fixup PCIe PRODUCT_ID.
+	 */
+	case DEVID_MV78460:
+		if (numcpus != 2)
+			return 0;
+		socid = DEVID_MV78230;
+		mask = PCIE0_EN | PCIE1_EN | PCIE0_QUADX1_EN;
+		break;
+	default:
+		return 0;
+	}
+
+	np = of_find_matching_node(NULL, armada_370_xp_pcie_of_ids);
+	if (!np)
+		return -ENODEV;
+
+	/* Enable all individual x1 ports */
+	ctrl = readl(ARMADA_370_XP_SOC_CTRL);
+	writel(ctrl | mask, ARMADA_370_XP_SOC_CTRL);
+
+	for_each_child_of_node(np, cnp) {
+		base = of_iomap(cnp, 0);
+		if (!base)
+			continue;
+
+		/* Fixup PCIe port DEVICE_ID */
+		reg = readl(base + PCIE_VEN_DEV_ID);
+		reg = (socid << 16) | (reg & 0xffff);
+		writel(reg, base + PCIE_VEN_DEV_ID);
+	}
+
+	/* Restore SoC Control */
+	writel(ctrl, ARMADA_370_XP_SOC_CTRL);
+
+	return 0;
+}
+
 static void __noreturn armada_370_xp_reset_cpu(unsigned long addr)
 {
 	writel(0x1, ARMADA_370_XP_SYSCTL_BASE + 0x60);
@@ -52,6 +112,18 @@ static void __noreturn armada_370_xp_reset_cpu(unsigned long addr)
 		;
 }
 
+static int armada_xp_init_soc(struct device_node *root)
+{
+	u32 reg;
+
+	/* Enable GBE0, GBE1, LCD and NFC PUP */
+	reg = readl(ARMADA_XP_PUP_ENABLE);
+	reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN;
+	writel(reg, ARMADA_XP_PUP_ENABLE);
+
+	return 0;
+}
+
 static int armada_370_xp_init_soc(struct device_node *root, void *context)
 {
 	unsigned long phys_base, phys_size;
@@ -66,18 +138,19 @@ static int armada_370_xp_init_soc(struct device_node *root, void *context)
 	barebox_set_hostname("armada");
 
 	/* Disable MBUS error propagation */
-	reg = readl(ARMADA_370_XP_FABRIC_BASE);
-	reg &= ~BIT(8);
-	writel(reg, ARMADA_370_XP_FABRIC_BASE);
+	reg = readl(ARMADA_370_XP_FABRIC_CTRL);
+	reg &= ~MBUS_ERR_PROP_EN;
+	writel(reg, ARMADA_370_XP_FABRIC_CTRL);
 
 	armada_370_xp_memory_find(&phys_base, &phys_size);
 
 	mvebu_set_memory(phys_base, phys_size);
+	mvebu_mbus_init();
 
-	/* Enable peripherals PUP */
-	reg = readl(ARMADA_XP_PUP_ENABLE_BASE);
-	reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN;
-	writel(reg, ARMADA_XP_PUP_ENABLE_BASE);
+	armada_370_xp_soc_id_fixup();
+
+	if (of_machine_is_compatible("marvell,armadaxp"))
+		armada_xp_init_soc(root);
 
 	return 0;
 }
diff --git a/arch/arm/mach-mvebu/common.c b/arch/arm/mach-mvebu/common.c
index 309f7a6aaa..7d28d9c45a 100644
--- a/arch/arm/mach-mvebu/common.c
+++ b/arch/arm/mach-mvebu/common.c
@@ -22,6 +22,7 @@
 #include <of_address.h>
 #include <linux/clk.h>
 #include <mach/common.h>
+#include <mach/socid.h>
 
 /*
  * Marvell MVEBU SoC id and revision can be read from any PCIe
@@ -40,10 +41,6 @@ static const struct of_device_id mvebu_pcie_of_ids[] = {
 	{ },
 };
 
-#define PCIE_VEN_DEV_ID		0x000
-#define PCIE_REV_ID		0x008
-#define  REV_ID_MASK		0xff
-
 static int mvebu_soc_id_init(void)
 {
 	struct device_node *np, *cnp;
diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c
index c2852f8986..a7284fd33a 100644
--- a/arch/arm/mach-mvebu/dove.c
+++ b/arch/arm/mach-mvebu/dove.c
@@ -93,6 +93,7 @@ static int dove_init_soc(struct device_node *root, void *context)
 	dove_memory_find(&phys_base, &phys_size);
 
 	mvebu_set_memory(phys_base, phys_size);
+	mvebu_mbus_init();
 
 	return 0;
 }
diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
index bac27e5a26..1dad053172 100644
--- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
+++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h
@@ -25,12 +25,19 @@
 	(ARMADA_370_XP_UART_BASE + ((n) * 0x100))
 
 #define ARMADA_370_XP_SYSCTL_BASE	(ARMADA_370_XP_INT_REGS_BASE + 0x18200)
-#define ARMADA_370_XP_SAR_BASE		(ARMADA_370_XP_INT_REGS_BASE + 0x18230)
-#define  SAR_LOW			0x00
+#define ARMADA_370_XP_SOC_CTRL		(ARMADA_370_XP_SYSCTL_BASE + 0x004)
+#define  PCIE1_QUADX1_EN		BIT(8)
+#define  PCIE0_QUADX1_EN		BIT(7)
+#define  PCIE3_EN			BIT(3)
+#define  PCIE2_EN			BIT(2)
+#define  PCIE1_EN			BIT(1)
+#define  PCIE0_EN			BIT(0)
+#define ARMADA_370_XP_SAR_LOW		(ARMADA_370_XP_SYSCTL_BASE + 0x030)
 #define  SAR_TCLK_FREQ			BIT(20)
-#define  SAR_HIGH			0x04
-
-#define ARMADA_XP_PUP_ENABLE_BASE       (ARMADA_370_XP_INT_REGS_BASE + 0x1864c)
+#define ARMADA_370_XP_SAR_HIGH		(ARMADA_370_XP_SYSCTL_BASE + 0x034)
+#define ARMADA_370_XP_CPU_SOC_ID	(ARMADA_370_XP_SYSCTL_BASE + 0x03c)
+#define  CPU_SOC_ID_DEVICE_MASK		0xffff
+#define ARMADA_XP_PUP_ENABLE		(ARMADA_370_XP_SYSCTL_BASE + 0x44c)
 #define  GE0_PUP_EN			BIT(0)
 #define  GE1_PUP_EN			BIT(1)
 #define  LCD_PUP_EN			BIT(2)
@@ -50,7 +57,19 @@
 #define  DDR_SIZE_MASK			0xff000000
 
 #define ARMADA_370_XP_FABRIC_BASE	(ARMADA_370_XP_INT_REGS_BASE + 0x20200)
+#define ARMADA_370_XP_FABRIC_CTRL	(ARMADA_370_XP_FABRIC_BASE + 0x000)
+#define  MBUS_ERR_PROP_EN		BIT(8)
+#define ARMADA_370_XP_FABRIC_CONF	(ARMADA_370_XP_FABRIC_BASE + 0x004)
+#define  FABRIC_NUM_CPUS_MASK		0x3
 
 #define ARMADA_370_XP_TIMER_BASE	(ARMADA_370_XP_INT_REGS_BASE + 0x20300)
 
-#endif /* __MACH_MVEBU_DOVE_REGS_H */
+#define ARMADA_370_XP_PCIE_UNIT_OFFSET	0x40000
+#define ARMADA_370_XP_PCIE_PORT_OFFSET	0x04000
+#define ARMADA_370_XP_PCIE_BASE(port)				\
+	(ARMADA_370_XP_INT_REGS_BASE + 0x40000 +		\
+	 (((port) / 4) * ARMADA_370_XP_PCIE_UNIT_OFFSET) +	\
+	 (((port) % 4) * ARMADA_370_XP_PCIE_PORT_OFFSET))
+#define  PCIE_DEVICE_VENDOR_ID		0x000
+
+#endif /* __MACH_MVEBU_ARMADA_370_XP_REGS_H */
diff --git a/arch/arm/mach-mvebu/include/mach/socid.h b/arch/arm/mach-mvebu/include/mach/socid.h
index 36d681a9dc..7a29c82b30 100644
--- a/arch/arm/mach-mvebu/include/mach/socid.h
+++ b/arch/arm/mach-mvebu/include/mach/socid.h
@@ -16,6 +16,10 @@
 #ifndef __MACH_MVEBU_SOCID_H
 #define __MACH_MVEBU_SOCID_H
 
+#define PCIE_VEN_DEV_ID		0x000
+#define PCIE_REV_ID		0x008
+#define  REV_ID_MASK		0xff
+
 extern u16 soc_devid;
 extern u16 soc_revid;
 
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
index d7903f732e..19c6f07303 100644
--- a/arch/arm/mach-mvebu/kirkwood.c
+++ b/arch/arm/mach-mvebu/kirkwood.c
@@ -66,6 +66,7 @@ static int kirkwood_init_soc(struct device_node *root, void *context)
 	kirkwood_memory_find(&phys_base, &phys_size);
 
 	mvebu_set_memory(phys_base, phys_size);
+	mvebu_mbus_init();
 
 	return 0;
 }