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authorSascha Hauer <s.hauer@pengutronix.de>2022-05-19 13:55:43 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-05-19 13:55:43 +0200
commit764fdbaba337e3b58f31ce7b177c4e7c0ba2088d (patch)
tree954b7c40be6beb5ab6ca9158840e93873cc43427 /arch
parent28889ccbfe785c59bfaa7c39985c376b697e2331 (diff)
parent747146a3eb186fb7101f1aaab53d9188dc41bfbb (diff)
downloadbarebox-764fdbaba337e3b58f31ce7b177c4e7c0ba2088d.tar.gz
barebox-764fdbaba337e3b58f31ce7b177c4e7c0ba2088d.tar.xz
Merge branch 'for-next/misc'
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boards/Makefile1
-rw-r--r--arch/arm/boards/archosg9/board.c2
-rw-r--r--arch/arm/boards/myirtech-x335x/Makefile3
-rw-r--r--arch/arm/boards/myirtech-x335x/board.c44
-rw-r--r--arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/boot/nand4
-rw-r--r--arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/nv/boot.default1
-rw-r--r--arch/arm/boards/myirtech-x335x/lowlevel.c115
-rw-r--r--arch/arm/boards/phytec-phycore-omap4460/board.c5
-rw-r--r--arch/arm/configs/am335x_mlo_defconfig1
-rw-r--r--arch/arm/configs/omap_defconfig3
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/am335x-myirtech-myd.dts47
-rw-r--r--arch/arm/dts/rk3568-bpi-r2-pro.dts7
-rw-r--r--arch/arm/dts/rk3568-evb1-v10.dts14
-rw-r--r--arch/arm/dts/rk3568.dtsi82
-rw-r--r--arch/arm/mach-omap/Kconfig6
-rw-r--r--arch/arm/mach-omap/Makefile2
-rw-r--r--arch/arm/mach-omap/include/mach/am33xx-clock.h1
-rw-r--r--arch/arm/mach-omap/include/mach/am33xx-silicon.h2
-rw-r--r--arch/arm/mach-omap/include/mach/devices.h3
-rw-r--r--arch/arm/mach-omap/include/mach/omap-fb.h49
-rw-r--r--arch/arm/mach-omap/omap4_generic.c17
-rw-r--r--arch/arm/mach-omap/omap_devices.c29
-rw-r--r--arch/arm/mach-omap/omap_fb.c36
-rw-r--r--arch/riscv/configs/sifive_defconfig13
25 files changed, 310 insertions, 178 deletions
diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 75e15cbda4..d303999614 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_MACH_MB7707) += module-mb7707/
obj-$(CONFIG_MACH_MIOA701) += mioa701/
obj-$(CONFIG_MACH_MX23EVK) += freescale-mx23-evk/
obj-$(CONFIG_MACH_MX28EVK) += freescale-mx28-evk/
+obj-$(CONFIG_MACH_MYIRTECH_X335X) += myirtech-x335x/
obj-$(CONFIG_MACH_NESO) += guf-neso/
obj-$(CONFIG_MACH_NETGEAR_RN104) += netgear-rn104/
obj-$(CONFIG_MACH_NETGEAR_RN2120) += netgear-rn2120/
diff --git a/arch/arm/boards/archosg9/board.c b/arch/arm/boards/archosg9/board.c
index 3289cfda3d..597830432b 100644
--- a/arch/arm/boards/archosg9/board.c
+++ b/arch/arm/boards/archosg9/board.c
@@ -5,10 +5,10 @@
#include <init.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
+#include <mach/devices.h>
#include <mach/omap4-silicon.h>
#include <mach/omap4-devices.h>
#include <mach/omap4_rom_usb.h>
-#include <mach/omap-fb.h>
#include <linux/sizes.h>
#include <i2c/i2c.h>
#include <gpio.h>
diff --git a/arch/arm/boards/myirtech-x335x/Makefile b/arch/arm/boards/myirtech-x335x/Makefile
new file mode 100644
index 0000000000..05d9fc7bc3
--- /dev/null
+++ b/arch/arm/boards/myirtech-x335x/Makefile
@@ -0,0 +1,3 @@
+lwl-y += lowlevel.o
+obj-y += board.o
+bbenv-$(CONFIG_DEFAULT_ENVIRONMENT) += defaultenv-myirtech-x335x
diff --git a/arch/arm/boards/myirtech-x335x/board.c b/arch/arm/boards/myirtech-x335x/board.c
new file mode 100644
index 0000000000..c6d808284e
--- /dev/null
+++ b/arch/arm/boards/myirtech-x335x/board.c
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* SPDX-FileCopyrightText: Alexander Shiyan <shc_work@mail.ru> */
+
+#include <bootsource.h>
+#include <common.h>
+#include <driver.h>
+#include <envfs.h>
+#include <init.h>
+#include <linux/sizes.h>
+#include <mach/am33xx-generic.h>
+
+static struct omap_barebox_part myir_barebox_part = {
+ .nand_offset = SZ_128K * 4,
+ .nand_size = SZ_1M,
+};
+
+static __init int myir_devices_init(void)
+{
+ if (!of_machine_is_compatible("myir,myc-am335x"))
+ return 0;
+
+ am33xx_register_ethaddr(0, 0);
+ am33xx_register_ethaddr(1, 1);
+
+ switch (bootsource_get()) {
+ case BOOTSOURCE_MMC:
+ omap_set_bootmmc_devname("mmc0");
+ break;
+ case BOOTSOURCE_NAND:
+ omap_set_barebox_part(&myir_barebox_part);
+ break;
+ default:
+ break;
+ }
+
+ if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT))
+ defaultenv_append_directory(defaultenv_myirtech_x335x);
+
+ if (IS_ENABLED(CONFIG_SHELL_NONE))
+ return am33xx_of_register_bootdevice();
+
+ return 0;
+}
+coredevice_initcall(myir_devices_init);
diff --git a/arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/boot/nand b/arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/boot/nand
new file mode 100644
index 0000000000..c000041095
--- /dev/null
+++ b/arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/boot/nand
@@ -0,0 +1,4 @@
+#!/bin/sh
+
+global.bootm.image="/dev/nand0.system.ubi.kernel"
+global.linux.bootargs.dyn.root="ubi.mtd=system ubi.block=0,root root=fe00 ro"
diff --git a/arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/nv/boot.default b/arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/nv/boot.default
new file mode 100644
index 0000000000..026a25cc7e
--- /dev/null
+++ b/arch/arm/boards/myirtech-x335x/defaultenv-myirtech-x335x/nv/boot.default
@@ -0,0 +1 @@
+nand
diff --git a/arch/arm/boards/myirtech-x335x/lowlevel.c b/arch/arm/boards/myirtech-x335x/lowlevel.c
new file mode 100644
index 0000000000..e867a0be7d
--- /dev/null
+++ b/arch/arm/boards/myirtech-x335x/lowlevel.c
@@ -0,0 +1,115 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/* SPDX-FileCopyrightText: Alexander Shiyan <shc_work@mail.ru> */
+
+#include <io.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <debug_ll.h>
+#include <init.h>
+#include <linux/sizes.h>
+#include <mach/am33xx-clock.h>
+#include <mach/am33xx-generic.h>
+#include <mach/am33xx-mux.h>
+#include <mach/generic.h>
+#include <mach/sdrc.h>
+#include <mach/sys_info.h>
+#include <mach/wdt.h>
+
+#define AM335X_ZCZ_1000 0x1c2f
+
+static const struct am33xx_ddr_data ddr3_data = {
+ .rd_slave_ratio0 = 0x38,
+ .wr_dqs_slave_ratio0 = 0x44,
+ .fifo_we_slave_ratio0 = 0x94,
+ .wr_slave_ratio0 = 0x7d,
+ .use_rank0_delay = 0x01,
+ .dll_lock_diff0 = 0x00,
+};
+
+static const struct am33xx_cmd_control ddr3_cmd_ctrl = {
+ .slave_ratio0 = 0x80,
+ .dll_lock_diff0 = 0x01,
+ .invert_clkout0 = 0x00,
+ .slave_ratio1 = 0x80,
+ .dll_lock_diff1 = 0x01,
+ .invert_clkout1 = 0x00,
+ .slave_ratio2 = 0x80,
+ .dll_lock_diff2 = 0x01,
+ .invert_clkout2 = 0x00,
+};
+
+/* CPU module contains 512MB (2*256MB) DDR3 SDRAM (2*128MB compatible),
+ * so we configure EMIF for 512MB then detect real size of memory.
+ */
+static const struct am33xx_emif_regs ddr3_regs = {
+ .emif_read_latency = 0x00100007,
+ .emif_tim1 = 0x0aaad4db,
+ .emif_tim2 = 0x266b7fda,
+ .emif_tim3 = 0x501f867f,
+ .zq_config = 0x50074be4,
+ .sdram_config = 0x61c05332,
+ .sdram_config2 = 0x00,
+ .sdram_ref_ctrl = 0xc30,
+};
+
+extern char __dtb_z_am335x_myirtech_myd_start[];
+
+ENTRY_FUNCTION(start_am33xx_myirtech_sram, bootinfo, r1, r2)
+{
+ int mpupll;
+ void *fdt;
+
+ am33xx_save_bootinfo((void *)bootinfo);
+
+ arm_cpu_lowlevel_init();
+
+ relocate_to_current_adr();
+ setup_c();
+
+ fdt = __dtb_z_am335x_myirtech_myd_start;
+
+ /* WDT1 is already running when the bootloader gets control
+ * Disable it to avoid "random" resets
+ */
+ __raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
+ while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+ __raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
+ while (__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+
+ mpupll = MPUPLL_M_800;
+ if (am33xx_get_cpu_rev() == AM335X_ES2_1) {
+ u32 deviceid = readl(AM33XX_EFUSE_SMA) & 0x1fff;
+ if (deviceid == AM335X_ZCZ_1000)
+ mpupll = MPUPLL_M_1000;
+ }
+
+ am33xx_pll_init(mpupll, DDRPLL_M_400);
+
+ am335x_sdram_init(0x18b, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data);
+
+ if (IS_ENABLED(CONFIG_DEBUG_LL)) {
+ am33xx_uart_soft_reset(IOMEM(AM33XX_UART0_BASE));
+ am33xx_enable_uart0_pin_mux();
+ omap_uart_lowlevel_init(IOMEM(AM33XX_UART0_BASE));
+ putc_ll('>');
+ }
+
+ barebox_arm_entry(AM33XX_DRAM_ADDR_SPACE_START, SZ_256M, fdt);
+}
+
+ENTRY_FUNCTION(start_am33xx_myirtech_sdram, r0, r1, r2)
+{
+ void *fdt;
+ u32 sdram_size;
+
+ fdt = __dtb_z_am335x_myirtech_myd_start;
+
+ fdt += get_runtime_offset();
+
+ /* Detect 256M/512M module variant */
+ __raw_writel(SZ_512M, AM33XX_DRAM_ADDR_SPACE_START + SZ_256M);
+ __raw_writel(SZ_256M, AM33XX_DRAM_ADDR_SPACE_START + 0);
+ sdram_size = __raw_readl(AM33XX_DRAM_ADDR_SPACE_START + SZ_256M);
+
+ barebox_arm_entry(AM33XX_DRAM_ADDR_SPACE_START, sdram_size, fdt);
+}
diff --git a/arch/arm/boards/phytec-phycore-omap4460/board.c b/arch/arm/boards/phytec-phycore-omap4460/board.c
index 9e8b9e56a7..e25ff5eb31 100644
--- a/arch/arm/boards/phytec-phycore-omap4460/board.c
+++ b/arch/arm/boards/phytec-phycore-omap4460/board.c
@@ -10,10 +10,10 @@
#include <envfs.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
+#include <mach/devices.h>
#include <mach/omap4-silicon.h>
#include <mach/omap4-devices.h>
#include <mach/omap4-clock.h>
-#include <mach/omap-fb.h>
#include <mach/sdrc.h>
#include <mach/sys_info.h>
#include <mach/syslib.h>
@@ -292,8 +292,7 @@ static int pcm049_devices_init(void)
armlinux_set_architecture(MACH_TYPE_PCM049);
- if (IS_ENABLED(CONFIG_DRIVER_VIDEO_OMAP))
- omap_add_display(&pcm049_fb_data);
+ omap_add_display(&pcm049_fb_data);
if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC))
defaultenv_append_directory(defaultenv_phytec_phycore_omap4460);
diff --git a/arch/arm/configs/am335x_mlo_defconfig b/arch/arm/configs/am335x_mlo_defconfig
index 51d238db3e..83bb20e4b5 100644
--- a/arch/arm/configs/am335x_mlo_defconfig
+++ b/arch/arm/configs/am335x_mlo_defconfig
@@ -5,6 +5,7 @@ CONFIG_OMAP_SERIALBOOT=y
CONFIG_OMAP_MULTI_BOARDS=y
CONFIG_MACH_AFI_GF=y
CONFIG_MACH_BEAGLEBONE=y
+CONFIG_MACH_MYIRTECH_X335X=y
CONFIG_MACH_PHYTEC_SOM_AM335X=y
CONFIG_THUMB2_BAREBOX=y
# CONFIG_MEMINFO is not set
diff --git a/arch/arm/configs/omap_defconfig b/arch/arm/configs/omap_defconfig
index 59892cb231..ae4d1a67da 100644
--- a/arch/arm/configs/omap_defconfig
+++ b/arch/arm/configs/omap_defconfig
@@ -6,6 +6,7 @@ CONFIG_OMAP_MULTI_BOARDS=y
CONFIG_MACH_AFI_GF=y
CONFIG_MACH_BEAGLE=y
CONFIG_MACH_BEAGLEBONE=y
+CONFIG_MACH_MYIRTECH_X335X=y
CONFIG_MACH_PHYTEC_SOM_AM335X=y
CONFIG_MACH_VSCOM_BALTOS=y
CONFIG_MACH_WAGO_PFC_AM35XX=y
@@ -46,6 +47,7 @@ CONFIG_CMD_GO=y
CONFIG_CMD_LOADB=y
CONFIG_CMD_RESET=y
CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_BOOTCHOOSER=y
CONFIG_CMD_PARTITION=y
CONFIG_CMD_UBIFORMAT=y
CONFIG_CMD_EXPORT=y
@@ -93,7 +95,6 @@ CONFIG_CMD_OF_FIXUP_STATUS=y
CONFIG_CMD_OFTREE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_STATE=y
-CONFIG_CMD_BOOTCHOOSER=y
CONFIG_NET=y
CONFIG_NET_NFS=y
CONFIG_NET_NETCONSOLE=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e0177d84e4..46e5e67672 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -40,6 +40,7 @@ lwl-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o
lwl-$(CONFIG_MACH_MARVELL_ARMADA_XP_DB) += armada-xp-db-bb.dtb.o
lwl-$(CONFIG_MACH_MB7707) += module-mb7707.dtb.o
lwl-$(CONFIG_MACH_MX28EVK) += imx28-evk.dtb.o
+lwl-$(CONFIG_MACH_MYIRTECH_X335X) += am335x-myirtech-myd.dtb.o
lwl-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o
lwl-$(CONFIG_MACH_NETGEAR_RN2120) += armada-xp-rn2120-bb.dtb.o
lwl-$(CONFIG_MACH_NITROGEN6) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dtb.o imx6qp-nitrogen6_max.dtb.o
diff --git a/arch/arm/dts/am335x-myirtech-myd.dts b/arch/arm/dts/am335x-myirtech-myd.dts
new file mode 100644
index 0000000000..6ec65e533d
--- /dev/null
+++ b/arch/arm/dts/am335x-myirtech-myd.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
+
+/dts-v1/;
+
+#include <arm/am335x-myirtech-myd.dts>
+
+/ {
+ chosen {
+ environment {
+ compatible = "barebox,environment";
+ device-path = &nand_environment;
+ };
+ };
+
+};
+
+&nand0 {
+ /delete-node/ partition@0;
+ /delete-node/ partition@20000;
+
+ nand_parts: partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "MLO";
+ reg = <0x00000 0x20000>;
+ };
+
+ partition@80000 {
+ label = "boot";
+ reg = <0x80000 0x100000>;
+ };
+
+ nand_environment: partition@180000 {
+ label = "env";
+ reg = <0x180000 0x40000>;
+ };
+
+ partition@1c0000 {
+ label = "system";
+ reg = <0x1c0000 0>;
+ };
+ };
+};
diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts
index db13f00cd0..da76ab64c1 100644
--- a/arch/arm/dts/rk3568-bpi-r2-pro.dts
+++ b/arch/arm/dts/rk3568-bpi-r2-pro.dts
@@ -560,16 +560,13 @@
status = "okay";
};
-&usbdrd_dwc3 {
+&usb_host0_xhci {
dr_mode = "host";
extcon = <&usb2phy0>;
-};
-
-&usbdrd30 {
status = "okay";
};
-&usbhost30 {
+&usb_host1_xhci {
status = "okay";
};
diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts
index 4ded9b1735..df5633978d 100644
--- a/arch/arm/dts/rk3568-evb1-v10.dts
+++ b/arch/arm/dts/rk3568-evb1-v10.dts
@@ -547,24 +547,20 @@
status = "okay";
};
-&usb_host1_ehci {
+&usb_host0_xhci {
+ extcon = <&usb2phy0>;
status = "okay";
};
-&usb_host1_ohci {
+&usb_host1_ehci {
status = "okay";
};
-&usbdrd_dwc3 {
- dr_mode = "otg";
- extcon = <&usb2phy0>;
-};
-
-&usbdrd30 {
+&usb_host1_ohci {
status = "okay";
};
-&usbhost30 {
+&usb_host1_xhci {
status = "okay";
};
diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi
index 0f19d3f0c0..3c458754af 100644
--- a/arch/arm/dts/rk3568.dtsi
+++ b/arch/arm/dts/rk3568.dtsi
@@ -198,62 +198,38 @@
};
};
- usbdrd30: usbdrd {
- compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3";
+ usb_host0_xhci: usb@fcc00000 {
+ compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
+ reg = <0x0 0xfcc00000 0x0 0x400000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
- <&cru ACLK_USB3OTG0>, <&cru PCLK_PIPE>;
+ <&cru ACLK_USB3OTG0>;
clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "pipe_clk";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ "bus_clk";
+ dr_mode = "otg";
+ phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ resets = <&cru SRST_USB3OTG0>;
+ snps,dis_u2_susphy_quirk;
status = "disabled";
-
- usbdrd_dwc3: dwc3@fcc00000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfcc00000 0x0 0x400000>;
- interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "otg";
- phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- resets = <&cru SRST_USB3OTG0>;
- reset-names = "usb3-otg";
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- snps,xhci-trb-ent-quirk;
- };
};
- usbhost30: usbhost {
- compatible = "rockchip,rk3568-dwc3", "rockchip,rk3399-dwc3";
+ usb_host1_xhci: usb@fd000000 {
+ compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
+ reg = <0x0 0xfd000000 0x0 0x400000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
- <&cru ACLK_USB3OTG1>, <&cru PCLK_PIPE>;
+ <&cru ACLK_USB3OTG1>;
clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "pipe_clk";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ "bus_clk";
+ dr_mode = "host";
+ phys = <&u2phy0_host>, <&combphy1_usq PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ resets = <&cru SRST_USB3OTG1>;
+ snps,dis_u2_susphy_quirk;
status = "disabled";
-
- usbhost_dwc3: dwc3@fd000000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfd000000 0x0 0x400000>;
- interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- phys = <&u2phy0_host>, <&combphy1_usq PHY_TYPE_USB3>;
- phy-names = "usb2-phy", "usb3-phy";
- phy_type = "utmi_wide";
- resets = <&cru SRST_USB3OTG1>;
- reset-names = "usb3-host";
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- snps,xhci-trb-ent-quirk;
- };
};
gic: interrupt-controller@fd400000 {
@@ -367,11 +343,10 @@
#phy-cells = <1>;
clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>,
<&cru PCLK_PIPE>;
- clock-names = "refclk", "apbclk", "pipe_clk";
+ clock-names = "ref", "apb", "pipe";
assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
assigned-clock-rates = <24000000>;
- resets = <&cru SRST_P_PIPEPHY0>, <&cru SRST_PIPEPHY0>;
- reset-names = "combphy-apb", "combphy";
+ resets = <&cru SRST_PIPEPHY0>;
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
status = "disabled";
@@ -383,11 +358,10 @@
#phy-cells = <1>;
clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>,
<&cru PCLK_PIPE>;
- clock-names = "refclk", "apbclk", "pipe_clk";
+ clock-names = "ref", "apb", "pipe";
assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
assigned-clock-rates = <24000000>;
- resets = <&cru SRST_P_PIPEPHY1>, <&cru SRST_PIPEPHY1>;
- reset-names = "combphy-apb", "combphy";
+ resets = <&cru SRST_PIPEPHY1>;
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
status = "disabled";
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index 220b635167..f0e035e31e 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -168,6 +168,12 @@ config MACH_BEAGLEBONE
help
Say Y here if you are using Beagle Bone
+config MACH_MYIRTECH_X335X
+ bool "MYIR Tech Limited SOMs"
+ select ARCH_AM33XX
+ help
+ Say Y here if you are using a TI AM335X based MYIR SOM
+
config MACH_PHYTEC_SOM_AM335X
bool "Phytec AM335X SOMs"
select ARCH_AM33XX
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index 36b2aa090e..e81284ec3b 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -15,7 +15,7 @@
# GNU General Public License for more details.
#
#
-obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o omap_generic.o omap_fb.o
+obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o omap_generic.o
pbl-$(CONFIG_ARCH_OMAP) += syslib.o
obj-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h
index 3c2143d600..b0293db990 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-clock.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h
@@ -25,6 +25,7 @@
#define MPUPLL_M_600 600 /* 125 * n */
#define MPUPLL_M_720 720 /* 125 * n */
#define MPUPLL_M_800 800
+#define MPUPLL_M_1000 1000
#define MPUPLL_M2 1
diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
index 0729369255..0467dac03b 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
@@ -201,6 +201,8 @@
#define AM33XX_MAC_ID1_HI (AM33XX_CTRL_BASE + 0x63c)
#define AM33XX_MAC_MII_SEL (AM33XX_CTRL_BASE + 0x650)
+#define AM33XX_EFUSE_SMA (AM33XX_CTRL_BASE + 0x7fc)
+
struct am33xx_cmd_control {
u32 slave_ratio0;
u32 dll_lock_diff0;
diff --git a/arch/arm/mach-omap/include/mach/devices.h b/arch/arm/mach-omap/include/mach/devices.h
index 0f9fdf1ca5..06fd2a8dd3 100644
--- a/arch/arm/mach-omap/include/mach/devices.h
+++ b/arch/arm/mach-omap/include/mach/devices.h
@@ -4,6 +4,7 @@
#define __MACH_OMAP_DEVICES_H
#include <mach/omap_hsmmc.h>
+#include <video/omap-fb.h>
void omap_add_ram0(resource_size_t size);
@@ -11,4 +12,6 @@ void omap_add_sram0(resource_size_t base, resource_size_t size);
struct device_d *omap_add_uart(int id, unsigned long base);
+struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata);
+
#endif /* __MACH_OMAP_DEVICES_H */
diff --git a/arch/arm/mach-omap/include/mach/omap-fb.h b/arch/arm/mach-omap/include/mach/omap-fb.h
deleted file mode 100644
index f727164434..0000000000
--- a/arch/arm/mach-omap/include/mach/omap-fb.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef H_BAREBOX_ARCH_ARM_MACH_OMAP_MACH_FB4_H
-#define H_BAREBOX_ARCH_ARM_MACH_OMAP_MACH_FB4_H
-
-#include <fb.h>
-
-#define OMAP_DSS_LCD_TFT (1u << 0)
-#define OMAP_DSS_LCD_IVS (1u << 1)
-#define OMAP_DSS_LCD_IHS (1u << 2)
-#define OMAP_DSS_LCD_IPC (1u << 3)
-#define OMAP_DSS_LCD_IEO (1u << 4)
-#define OMAP_DSS_LCD_RF (1u << 5)
-#define OMAP_DSS_LCD_ONOFF (1u << 6)
-
-#define OMAP_DSS_LCD_DATALINES(_l) ((_l) << 10)
-#define OMAP_DSS_LCD_DATALINES_msk OMAP_DSS_LCD_DATALINES(3u)
-#define OMAP_DSS_LCD_DATALINES_12 OMAP_DSS_LCD_DATALINES(0u)
-#define OMAP_DSS_LCD_DATALINES_16 OMAP_DSS_LCD_DATALINES(1u)
-#define OMAP_DSS_LCD_DATALINES_18 OMAP_DSS_LCD_DATALINES(2u)
-#define OMAP_DSS_LCD_DATALINES_24 OMAP_DSS_LCD_DATALINES(3u)
-
-struct omapfb_display {
- struct fb_videomode mode;
-
- unsigned long config;
-
- unsigned int power_on_delay;
- unsigned int power_off_delay;
-};
-
-struct omapfb_platform_data {
- struct omapfb_display const *displays;
- size_t num_displays;
-
- unsigned int dss_clk_hz;
-
- unsigned int bpp;
-
- struct resource const *screen;
-
- void (*enable)(int p);
-};
-
-struct device_d;
-struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata);
-
-
-#endif /* H_BAREBOX_ARCH_ARM_MACH_OMAP_MACH_FB4_H */
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c
index c9a89c57b7..406b686318 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -433,38 +433,29 @@ unsigned int omap4_revision(void)
return OMAP4430_ES1_0;
case MIDR_CORTEX_A9_R1P2:
switch (readl(CONTROL_ID_CODE)) {
- case OMAP4_CONTROL_ID_CODE_ES2_0:
- return OMAP4430_ES2_0;
- break;
case OMAP4_CONTROL_ID_CODE_ES2_1:
return OMAP4430_ES2_1;
- break;
case OMAP4_CONTROL_ID_CODE_ES2_2:
return OMAP4430_ES2_2;
- break;
default:
- return OMAP4430_ES2_0;
break;
}
- break;
+ return OMAP4430_ES2_0;
case MIDR_CORTEX_A9_R1P3:
return OMAP4430_ES2_3;
- break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
case OMAP4460_CONTROL_ID_CODE_ES1_1:
return OMAP4460_ES1_1;
- break;
- case OMAP4460_CONTROL_ID_CODE_ES1_0:
default:
- return OMAP4460_ES1_0;
break;
}
- break;
+ return OMAP4460_ES1_0;
default:
- return OMAP4430_SILICON_ID_INVALID;
break;
}
+
+ return OMAP4430_SILICON_ID_INVALID;
}
/*
diff --git a/arch/arm/mach-omap/omap_devices.c b/arch/arm/mach-omap/omap_devices.c
index 7c36b8819d..beae59f74d 100644
--- a/arch/arm/mach-omap/omap_devices.c
+++ b/arch/arm/mach-omap/omap_devices.c
@@ -26,3 +26,32 @@ struct device_d *omap_add_uart(int id, unsigned long base)
return add_generic_device("omap-uart", id, NULL, base, 1024,
IORESOURCE_MEM | IORESOURCE_MEM_8BIT, &serial_plat);
}
+
+#if defined(CONFIG_DRIVER_VIDEO_OMAP)
+static struct resource omapfb_resources[] = {
+ {
+ .name = "omap4_dss",
+ .start = 0x48040000,
+ .end = 0x48040000 + 512 - 1,
+ .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+ }, {
+ .name = "omap4_dispc",
+ .start = 0x48041000,
+ .end = 0x48041000 + 3072 - 1,
+ .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+ },
+};
+
+struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata)
+{
+ return add_generic_device_res("omap_fb", -1,
+ omapfb_resources,
+ ARRAY_SIZE(omapfb_resources),
+ o_pdata);
+}
+#else
+struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata)
+{
+ return NULL;
+}
+#endif
diff --git a/arch/arm/mach-omap/omap_fb.c b/arch/arm/mach-omap/omap_fb.c
deleted file mode 100644
index 0bd51c5f55..0000000000
--- a/arch/arm/mach-omap/omap_fb.c
+++ /dev/null
@@ -1,36 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-
-#include <driver.h>
-#include <common.h>
-#include <linux/ioport.h>
-#include <mach/omap-fb.h>
-
-#if defined(CONFIG_DRIVER_VIDEO_OMAP)
-static struct resource omapfb_resources[] = {
- {
- .name = "omap4_dss",
- .start = 0x48040000,
- .end = 0x48040000 + 512 - 1,
- .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
- }, {
- .name = "omap4_dispc",
- .start = 0x48041000,
- .end = 0x48041000 + 3072 - 1,
- .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
- },
-};
-
-struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata)
-{
- return add_generic_device_res("omap_fb", -1,
- omapfb_resources,
- ARRAY_SIZE(omapfb_resources),
- o_pdata);
-}
-#else
-struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata)
-{
- return NULL;
-}
-#endif
-EXPORT_SYMBOL(omap_add_display);
diff --git a/arch/riscv/configs/sifive_defconfig b/arch/riscv/configs/sifive_defconfig
index 59cfebf194..6ebe6eaf37 100644
--- a/arch/riscv/configs/sifive_defconfig
+++ b/arch/riscv/configs/sifive_defconfig
@@ -13,13 +13,10 @@ CONFIG_HUSH_FANCY_PROMPT=y
CONFIG_CMDLINE_EDITING=y
CONFIG_AUTO_COMPLETE=y
CONFIG_MENU=y
-CONFIG_IMD_TARGET=y
CONFIG_CONSOLE_ALLOW_COLOR=y
CONFIG_PBL_CONSOLE=y
CONFIG_PARTITION_DISK_EFI=y
CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
-CONFIG_BAREBOXENV_TARGET=y
-CONFIG_BAREBOXCRC32_TARGET=y
CONFIG_STATE=y
CONFIG_STATE_CRYPTO=y
CONFIG_BOOTCHOOSER=y
@@ -85,20 +82,21 @@ CONFIG_VIRTIO_CONSOLE=y
CONFIG_SERIAL_SIFIVE=y
CONFIG_DRIVER_NET_MACB=y
CONFIG_DRIVER_SPI_GPIO=y
+CONFIG_SPI_SIFIVE=y
CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_MTD=y
-# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_RAW_DEVICE=y
CONFIG_MTD_CONCAT=y
CONFIG_MTD_M25P80=y
CONFIG_DRIVER_CFI=y
CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
-CONFIG_DISK=y
-CONFIG_DISK_WRITE=y
CONFIG_VIRTIO_BLK=y
CONFIG_VIDEO=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_DRIVER_VIDEO_SIMPLEFB_CLIENT=y
+CONFIG_MCI=y
+CONFIG_MCI_SPI=y
CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
CONFIG_EEPROM_AT24=y
CONFIG_HWRNG=y
@@ -126,3 +124,6 @@ CONFIG_ZSTD_DECOMPRESS=y
CONFIG_XZ_DECOMPRESS=y
CONFIG_BASE64=y
CONFIG_DIGEST_CRC32_GENERIC=y
+CONFIG_IMD_TARGET=y
+CONFIG_BAREBOXENV_TARGET=y
+CONFIG_BAREBOXCRC32_TARGET=y