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author | Lucas Stach <dev@lynxeye.de> | 2013-12-03 20:56:56 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-12-04 14:59:39 +0100 |
commit | 7b6c063f5786b7552c2c8a97f3c57a3cd5b966a7 (patch) | |
tree | 366089d320a4e2f6434e89ddbc1ba8e151953d96 /arch | |
parent | c50a17104cb996c2b6e83da57c9f101164313798 (diff) | |
download | barebox-7b6c063f5786b7552c2c8a97f3c57a3cd5b966a7.tar.gz barebox-7b6c063f5786b7552c2c8a97f3c57a3cd5b966a7.tar.xz |
tegra: speed up system bus
We run the system bus from the OSC clock during init, to avoid crashing
the system while reconfiguring the PLLs.
Switch to a more reasonable clock when we are done with this.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-tegra/include/mach/tegra20-car.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/tegra20-car.h b/arch/arm/mach-tegra/include/mach/tegra20-car.h index d4cb2387f3..d4ff6fb7ba 100644 --- a/arch/arm/mach-tegra/include/mach/tegra20-car.h +++ b/arch/arm/mach-tegra/include/mach/tegra20-car.h @@ -53,6 +53,18 @@ #define CRC_SCLK_BURST_POLICY_SYS_STATE_RUN 2 #define CRC_SCLK_BURST_POLICY_SYS_STATE_IDLE 1 #define CRC_SCLK_BURST_POLICY_SYS_STATE_STDBY 0 +#define CRC_SCLK_BURST_POLICY_FIQ_SRC_SHIFT 12 +#define CRC_SCLK_BURST_POLICY_IRQ_SRC_SHIFT 8 +#define CRC_SCLK_BURST_POLICY_RUN_SRC_SHIFT 4 +#define CRC_SCLK_BURST_POLICY_IDLE_SRC_SHIFT 0 +#define CRC_SCLK_BURST_POLICY_SRC_CLKM 0 +#define CRC_SCLK_BURST_POLICY_SRC_PLLC_OUT1 1 +#define CRC_SCLK_BURST_POLICY_SRC_PLLP_OUT4 2 +#define CRC_SCLK_BURST_POLICY_SRC_PLLP_OUT3 3 +#define CRC_SCLK_BURST_POLICY_SRC_PLLP_OUT2 4 +#define CRC_SCLK_BURST_POLICY_SRC_CLKD 5 +#define CRC_SCLK_BURST_POLICY_SRC_CLKS 6 +#define CRC_SCLK_BURST_POLICY_SRC_PLLM_OUT1 7 #define CRC_SUPER_SCLK_DIV 0x02c #define CRC_SUPER_SDIV_ENB (1 << 31) |