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authorAhmad Fatoum <ahmad@a3f.at>2020-04-27 09:13:49 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-05-08 14:06:51 +0200
commit7be1d2fc5209d5888be0e40991e777e57bfbd906 (patch)
treeaa1669c9ad133c8785091056f9efd4b417e27f1e /arch
parent085f73d5d3c691ed23794d6cd0b9a5d16ad8e335 (diff)
downloadbarebox-7be1d2fc5209d5888be0e40991e777e57bfbd906.tar.gz
barebox-7be1d2fc5209d5888be0e40991e777e57bfbd906.tar.xz
ARM: i.MX: boot: correctly handle SRC_SBMR1 override via SRC_GPR9
`mw 0x20d8040 0x08000030; mw 0x20d8044 0x10000000; reset` issued on an i.MX6Q forces boot from the ecspi1. This is because the BootROM reads the boot mode out of SRC_GPR9 instead of SRC_SBMR1 whenever SRC_GPR10 has its 28th bit set. Teach barebox about this, so we don't end up with a wrong $bootsource when putting SRC_GPR9 into use. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/boot.c25
1 files changed, 19 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
index 7bce1c710c..3ff297d46e 100644
--- a/arch/arm/mach-imx/boot.c
+++ b/arch/arm/mach-imx/boot.c
@@ -320,10 +320,13 @@ void imx53_boot_save_loc(void)
#define IMX6_SRC_SBMR1 0x04
#define IMX6_SRC_SBMR2 0x1c
+#define IMX6_SRC_GPR9 0x40
+#define IMX6_SRC_GPR10 0x44
#define IMX6_BMOD_SERIAL 0b01
#define IMX6_BMOD_RESERVED 0b11
#define IMX6_BMOD_FUSES 0b00
#define BT_FUSE_SEL BIT(4)
+#define GPR10_BOOT_FROM_GPR9 BIT(28)
static bool imx6_bootsource_reserved(uint32_t sbmr2)
{
@@ -388,11 +391,21 @@ static int imx6_boot_instance_mmc(uint32_t r)
return FIELD_GET(BOOT_CFG2(4, 3), r);
}
+static u32 imx6_get_src_boot_mode(void __iomem *src_base)
+{
+ if (readl(src_base + IMX6_SRC_GPR10) & GPR10_BOOT_FROM_GPR9)
+ return readl(src_base + IMX6_SRC_GPR9);
+
+ return readl(src_base + IMX6_SRC_SBMR1);
+}
+
void imx6_get_boot_source(enum bootsource *src, int *instance)
{
void __iomem *src_base = IOMEM(MX6_SRC_BASE_ADDR);
- uint32_t sbmr1 = readl(src_base + IMX6_SRC_SBMR1);
uint32_t sbmr2 = readl(src_base + IMX6_SRC_SBMR2);
+ uint32_t bootmode;
+
+ bootmode = imx6_get_src_boot_mode(src_base);
if (imx6_bootsource_reserved(sbmr2))
return;
@@ -402,23 +415,23 @@ void imx6_get_boot_source(enum bootsource *src, int *instance)
return;
}
- switch (imx53_bootsource_internal(sbmr1)) {
+ switch (imx53_bootsource_internal(bootmode)) {
case 2:
*src = BOOTSOURCE_HD;
break;
case 3:
- *src = imx6_bootsource_serial_rom(sbmr1);
- *instance = imx6_boot_instance_serial_rom(sbmr1);
+ *src = imx6_bootsource_serial_rom(bootmode);
+ *instance = imx6_boot_instance_serial_rom(bootmode);
break;
case 4:
case 5:
case 6:
case 7:
*src = BOOTSOURCE_MMC;
- *instance = imx6_boot_instance_mmc(sbmr1);
+ *instance = imx6_boot_instance_mmc(bootmode);
break;
default:
- if (imx53_bootsource_nand(sbmr1))
+ if (imx53_bootsource_nand(bootmode))
*src = BOOTSOURCE_NAND;
break;
}