Merge branch 'for-next/riscv'

29 files changed, 525 insertions, 208 deletions

diff --git a/arch/arm/lib64/armlinux.c b/arch/arm/lib64/armlinux.c
index a5f122edcd..0ba4d30b8e 100644
--- a/arch/arm/lib64/armlinux.c
+++ b/arch/arm/lib64/armlinux.c
@@ -1,90 +1,26 @@
 // SPDX-License-Identifier: GPL-2.0-only
 // SPDX-FileCopyrightText: 2018 Sascha Hauer <s.hauer@pengutronix.de>
 
-#include <boot.h>
 #include <common.h>
-#include <environment.h>
-#include <image.h>
-#include <fs.h>
-#include <xfuncs.h>
-#include <malloc.h>
-#include <fcntl.h>
-#include <errno.h>
 #include <memory.h>
-#include <of.h>
 #include <init.h>
 #include <bootm.h>
-#include <linux/list.h>
-#include <asm/byteorder.h>
-#include <asm/setup.h>
-#include <asm/barebox-arm.h>
-#include <asm/armlinux.h>
-#include <asm/system.h>
 
 static int do_bootm_linux(struct image_data *data)
 {
-	const void *kernel_header =
-			data->os_fit ? data->fit_kernel : data->os_header;
 	void (*fn)(unsigned long dtb, unsigned long x1, unsigned long x2,
 		       unsigned long x3);
-	resource_size_t start, end;
-	unsigned long text_offset, image_size, devicetree, kernel;
-	unsigned long image_end;
-	int ret;
-	void *fdt;
-
-	text_offset = le64_to_cpup(kernel_header + 8);
-	image_size = le64_to_cpup(kernel_header+ 16);
-
-	ret = memory_bank_first_find_space(&start, &end);
-	if (ret)
-		goto out;
-
-	kernel = ALIGN(start, SZ_2M) + text_offset;
-
-	ret = bootm_load_os(data, kernel);
-	if (ret)
-		goto out;
-
-	image_end = PAGE_ALIGN(kernel + image_size);
-
-	if (bootm_has_initrd(data)) {
-		ret = bootm_load_initrd(data, image_end);
-		if (ret)
-			return ret;
-
-		image_end += resource_size(data->initrd_res);
-		image_end = PAGE_ALIGN(image_end);
-	}
+	phys_addr_t devicetree;
 
-	devicetree = image_end;
-
-	fdt = bootm_get_devicetree(data);
-	if (IS_ERR(fdt)) {
-		ret = PTR_ERR(fdt);
-		goto out;
-	}
-
-	ret = bootm_load_devicetree(data, fdt, devicetree);
-
-	free(fdt);
-
-	if (ret)
-		goto out;
-
-	printf("Loaded kernel to 0x%08lx, devicetree at 0x%08lx\n",
-	       kernel, devicetree);
+	fn = booti_load_image(data, &devicetree);
+	if (IS_ERR(fn))
+		return PTR_ERR(fn);
 
 	shutdown_barebox();
 
-	fn = (void *)kernel;
-
 	fn(devicetree, 0, 0, 0);
 
-	ret = -EINVAL;
-
-out:
-	return ret;
+	return -EINVAL;
 }
 
 static struct image_handler aarch64_linux_handler = {
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index c0583f3153..a4aa799acf 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -19,31 +19,6 @@ config ARCH_TEXT_BASE
 	hex
 	default 0x0
 
-menu "Machine selection"
-
-choice
-	prompt "System type"
-	default MACH_ERIZO
-
-config MACH_ERIZO
-	bool "erizo family"
-	select ARCH_RV32I
-	select HAS_DEBUG_LL
-	select HAS_NMON
-	select USE_COMPRESSED_DTB
-	select RISCV_M_MODE
-	select RISCV_TIMER
-
-config MACH_VIRT
-	bool "virt family"
-	select BOARD_RISCV_GENERIC_DT
-	select CLINT_TIMER
-	help
-	  Generates an image tht can be be booted by QEMU. The image is called
-	  barebox-dt-2nd.img
-
-endchoice
-
 choice
 	prompt "Base ISA"
 	default ARCH_RV32I
@@ -63,6 +38,8 @@ config ARCH_RV64I
 
 endchoice
 
+source "arch/riscv/Kconfig.socs"
+
 config CPU_SUPPORTS_32BIT_KERNEL
 	bool
 
@@ -82,8 +59,6 @@ config 64BIT
 	select ARCH_DMA_ADDR_T_64BIT
 	select PHYS_ADDR_T_64BIT
 
-source "arch/riscv/mach-erizo/Kconfig"
-
 config BOARD_RISCV_GENERIC_DT
 	select BOARD_GENERIC_DT
 	bool "Build generic RISC-V device tree 2nd stage image"
@@ -93,8 +68,6 @@ config BOARD_RISCV_GENERIC_DT
 	  in a1 like the Kernel does, so it could be used anywhere where a Kernel
 	  image could be used. The image will be called images/barebox-dt-2nd.img
 
-endmenu
-
 menu "RISC-V specific settings"
 
 config RISCV_OPTIMZED_STRING_FUNCTIONS
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
new file mode 100644
index 0000000000..c6875738d0
--- /dev/null
+++ b/arch/riscv/Kconfig.socs
@@ -0,0 +1,43 @@
+menu "SoC selection"
+
+config SOC_ERIZO
+	bool "Erizo SoC"
+	depends on ARCH_RV32I
+	select HAS_ASM_DEBUG_LL
+	select HAS_NMON
+	select USE_COMPRESSED_DTB
+	select RISCV_M_MODE
+	select RISCV_TIMER
+
+config BOARD_ERIZO_GENERIC
+	depends on SOC_ERIZO
+	def_bool y
+
+config SOC_VIRT
+	bool "QEMU Virt Machine"
+	select BOARD_RISCV_GENERIC_DT
+	select CLINT_TIMER
+	help
+	  Generates an image tht can be be booted by QEMU. The image is called
+	  barebox-dt-2nd.img
+
+config SOC_SIFIVE
+	bool "SiFive SoCs"
+	select CLK_SIFIVE
+	select CLK_SIFIVE_PRCI
+	select RISCV_TIMER
+	select HAS_MACB
+	select HAS_ASM_DEBUG_LL
+	help
+	  This enables support for SiFive SoC platform hardware.
+
+if SOC_SIFIVE
+
+config BOARD_HIFIVE
+	bool "HiFive"
+	depends on ARCH_RV64I
+	select USE_COMPRESSED_DTB
+
+endif
+
+endmenu
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index aba4526bba..0b1278936d 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -19,9 +19,6 @@ LDFLAGS_pbl += $(riscv-ldflags-y)
 cflags-y += $(riscv-cflags-y)
 LDFLAGS_barebox += -nostdlib
 
-machine-$(CONFIG_MACH_ERIZO)	:= erizo
-machine-$(CONFIG_MACH_VIRT)	:= virt
-
 LDFLAGS_barebox += $(riscv-ldflags-y)
 
 ifndef CONFIG_MODULES
@@ -32,21 +29,10 @@ endif
 
 KBUILD_BINARY := barebox.bin
 
-machdirs := $(patsubst %,arch/riscv/mach-%/,$(machine-y))
-
-KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
-
 archprepare: maketools
 
 PHONY += maketools
 
-ifneq ($(machine-y),)
-MACH  := arch/riscv/mach-$(machine-y)/
-else
-MACH  :=
-endif
-
-common-y += $(MACH)
 common-y += arch/riscv/boards/
 common-y += arch/riscv/cpu/
 common-y += arch/riscv/lib/
diff --git a/arch/riscv/boards/Makefile b/arch/riscv/boards/Makefile
index 2ce9af41e0..99f22f32b4 100644
--- a/arch/riscv/boards/Makefile
+++ b/arch/riscv/boards/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_BOARD_ERIZO_GENERIC)	+= erizo/
+obj-$(CONFIG_BOARD_HIFIVE)		+= hifive/
diff --git a/arch/riscv/boards/erizo/lowlevel.c b/arch/riscv/boards/erizo/lowlevel.c
index d9edb530b7..6acf15931c 100644
--- a/arch/riscv/boards/erizo/lowlevel.c
+++ b/arch/riscv/boards/erizo/lowlevel.c
@@ -8,7 +8,7 @@ ENTRY_FUNCTION(start_erizo_generic, a0, a1, a2)
 {
 	extern char __dtb_z_erizo_generic_start[];
 
-	debug_ll_ns16550_init();
+	debug_ll_init();
 	putc_ll('>');
 
 	/* On POR, we are running from read-only memory here. */
diff --git a/arch/riscv/boards/hifive/Makefile b/arch/riscv/boards/hifive/Makefile
new file mode 100644
index 0000000000..3d217ffe0b
--- /dev/null
+++ b/arch/riscv/boards/hifive/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+pbl-y += lowlevel.o
diff --git a/arch/riscv/boards/hifive/lowlevel.c b/arch/riscv/boards/hifive/lowlevel.c
new file mode 100644
index 0000000000..1de13cac16
--- /dev/null
+++ b/arch/riscv/boards/hifive/lowlevel.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <common.h>
+#include <asm/barebox-riscv.h>
+#include <debug_ll.h>
+
+ENTRY_FUNCTION(start_hifive_unmatched, a0, a1, a2)
+{
+	extern char __dtb_z_hifive_unmatched_a00_start[];
+
+	putc_ll('>');
+
+	barebox_riscv_entry(0x80000000, SZ_128M,
+			    __dtb_z_hifive_unmatched_a00_start + get_runtime_offset());
+}
+
+ENTRY_FUNCTION(start_hifive_unleashed, a0, a1, a2)
+{
+	extern char __dtb_z_hifive_unleashed_a00_start[];
+
+	putc_ll('>');
+
+	barebox_riscv_entry(0x80000000, SZ_128M,
+			    __dtb_z_hifive_unleashed_a00_start + get_runtime_offset());
+}
diff --git a/arch/riscv/boot/board-dt-2nd.c b/arch/riscv/boot/board-dt-2nd.c
index be28ea23cd..e9810f8add 100644
--- a/arch/riscv/boot/board-dt-2nd.c
+++ b/arch/riscv/boot/board-dt-2nd.c
@@ -3,7 +3,7 @@
 #include <common.h>
 #include <asm/sections.h>
 #include <linux/sizes.h>
-#include <debug_ll.h>
+#include <asm/ns16550.h>
 #include <pbl.h>
 #include <fdt.h>
 
@@ -22,10 +22,29 @@
 
 #include <asm/barebox-riscv.h>
 
+static void virt_ns16550_putc(void *base, int ch)
+{
+	early_ns16550_putc(ch, base, 0, readb, writeb);
+}
+
+static void virt_ns16550_init(void)
+{
+	void __iomem *base = IOMEM(0x10000000);
+
+	early_ns16550_init(base, 3686400 / CONFIG_BAUDRATE, 0, writeb);
+	pbl_set_putc(virt_ns16550_putc, base);
+}
+
+static const struct fdt_device_id console_ids[] = {
+	{ .compatible = "riscv-virtio", .data = virt_ns16550_init },
+	{ /* sentinel */ }
+};
+
 ENTRY_FUNCTION(start_dt_2nd, a0, _fdt, a2)
 {
 	unsigned long membase, memsize, endmem, endfdt, uncompressed_len;
 	struct fdt_header *fdt = (void *)_fdt;
+	void (*pbl_uart_init)(void);
 
 	if (!fdt)
 		hang();
@@ -33,6 +52,12 @@ ENTRY_FUNCTION(start_dt_2nd, a0, _fdt, a2)
 	relocate_to_current_adr();
 	setup_c();
 
+	pbl_uart_init = fdt_device_get_match_data(fdt, "/", console_ids);
+	if (pbl_uart_init) {
+		pbl_uart_init();
+		putchar('>');
+	}
+
 	fdt_find_mem(fdt, &membase, &memsize);
 	endmem = membase + memsize;
 	endfdt = _fdt + be32_to_cpu(fdt->totalsize);
diff --git a/arch/riscv/configs/erizo_generic_defconfig b/arch/riscv/configs/erizo_generic_defconfig
index 839b652ab5..247a179130 100644
--- a/arch/riscv/configs/erizo_generic_defconfig
+++ b/arch/riscv/configs/erizo_generic_defconfig
@@ -1,3 +1,4 @@
+CONFIG_SOC_ERIZO=y
 # CONFIG_GLOBALVAR is not set
 CONFIG_STACK_SIZE=0x20000
 CONFIG_MALLOC_SIZE=0x100000
diff --git a/arch/riscv/configs/sifive_defconfig b/arch/riscv/configs/sifive_defconfig
new file mode 100644
index 0000000000..59cfebf194
--- /dev/null
+++ b/arch/riscv/configs/sifive_defconfig
@@ -0,0 +1,128 @@
+CONFIG_ARCH_RV64I=y
+CONFIG_SOC_SIFIVE=y
+CONFIG_BOARD_HIFIVE=y
+CONFIG_BOARD_RISCV_GENERIC_DT=y
+CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
+CONFIG_STACK_SIZE=0x20000
+CONFIG_MALLOC_SIZE=0x0
+CONFIG_MALLOC_TLSF=y
+CONFIG_KALLSYMS=y
+CONFIG_RELOCATABLE=y
+CONFIG_PANIC_HANG=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+CONFIG_MENU=y
+CONFIG_IMD_TARGET=y
+CONFIG_CONSOLE_ALLOW_COLOR=y
+CONFIG_PBL_CONSOLE=y
+CONFIG_PARTITION_DISK_EFI=y
+CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
+CONFIG_BAREBOXENV_TARGET=y
+CONFIG_BAREBOXCRC32_TARGET=y
+CONFIG_STATE=y
+CONFIG_STATE_CRYPTO=y
+CONFIG_BOOTCHOOSER=y
+CONFIG_RESET_SOURCE=y
+CONFIG_MACHINE_ID=y
+CONFIG_CMD_DMESG=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_IMD=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_POLLER=y
+CONFIG_CMD_SLICE=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_BOOTCHOOSER=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_PRINTENV=y
+CONFIG_CMD_MAGICVAR=y
+CONFIG_CMD_MAGICVAR_HELP=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_CMP=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_SHA256SUM=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_SPLASH=y
+CONFIG_CMD_FBTEST=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DETECT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_2048=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_OF_DIFF=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OF_DISPLAY_TIMINGS=y
+CONFIG_CMD_OF_FIXUP_STATUS=y
+CONFIG_CMD_OF_OVERLAY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_NET=y
+CONFIG_NET_NFS=y
+CONFIG_NET_FASTBOOT=y
+CONFIG_DRIVER_SERIAL_NS16550=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_SERIAL_SIFIVE=y
+CONFIG_DRIVER_NET_MACB=y
+CONFIG_DRIVER_SPI_GPIO=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_MTD=y
+# CONFIG_MTD_OOB_DEVICE is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_M25P80=y
+CONFIG_DRIVER_CFI=y
+CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
+CONFIG_DISK=y
+CONFIG_DISK_WRITE=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIDEO=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_DRIVER_VIDEO_SIMPLEFB_CLIENT=y
+CONFIG_CLOCKSOURCE_DUMMY_RATE=60000
+CONFIG_EEPROM_AT24=y
+CONFIG_HWRNG=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_GPIO_SIFIVE=y
+# CONFIG_PINCTRL is not set
+CONFIG_SYSCON_REBOOT_MODE=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_FS_EXT4=y
+CONFIG_FS_TFTP=y
+CONFIG_FS_NFS=y
+CONFIG_FS_FAT=y
+CONFIG_FS_FAT_WRITE=y
+CONFIG_FS_FAT_LFN=y
+CONFIG_FS_UIMAGEFS=y
+CONFIG_FS_PSTORE=y
+CONFIG_FS_SQUASHFS=y
+CONFIG_ZLIB=y
+CONFIG_BZLIB=y
+CONFIG_LZ4_DECOMPRESS=y
+CONFIG_ZSTD_DECOMPRESS=y
+CONFIG_XZ_DECOMPRESS=y
+CONFIG_BASE64=y
+CONFIG_DIGEST_CRC32_GENERIC=y
diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index 83e3ca1bad..218fee57b7 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -1,4 +1,4 @@
-CONFIG_MACH_VIRT=y
+CONFIG_SOC_VIRT=y
 CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_STACK_SIZE=0x20000
 CONFIG_MALLOC_SIZE=0x0
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index 17ce16637d..04a4f1e2f4 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -1,4 +1,4 @@
-CONFIG_MACH_VIRT=y
+CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV64I=y
 CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_STACK_SIZE=0x20000
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4041c34e0c..17fdc9445b 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -5,5 +5,7 @@
 obj- += dummy.o
 
 pbl-$(CONFIG_BOARD_ERIZO_GENERIC) += erizo-generic.dtb.o
+pbl-$(CONFIG_BOARD_HIFIVE) += hifive-unmatched-a00.dtb.o \
+                              hifive-unleashed-a00.dtb.o
 
 clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts
diff --git a/arch/riscv/dts/hifive-unleashed-a00.dts b/arch/riscv/dts/hifive-unleashed-a00.dts
new file mode 100644
index 0000000000..65694bfd24
--- /dev/null
+++ b/arch/riscv/dts/hifive-unleashed-a00.dts
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0 OR X11 */
+
+#include <riscv/sifive/hifive-unleashed-a00.dts>
diff --git a/arch/riscv/dts/hifive-unmatched-a00.dts b/arch/riscv/dts/hifive-unmatched-a00.dts
new file mode 100644
index 0000000000..b8793e9105
--- /dev/null
+++ b/arch/riscv/dts/hifive-unmatched-a00.dts
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0 OR X11 */
+
+#include <riscv/sifive/hifive-unmatched-a00.dts>
diff --git a/arch/riscv/include/asm/barebox-riscv-head.h b/arch/riscv/include/asm/barebox-riscv-head.h
index f681ec8bce..a4c33472cd 100644
--- a/arch/riscv/include/asm/barebox-riscv-head.h
+++ b/arch/riscv/include/asm/barebox-riscv-head.h
@@ -30,7 +30,7 @@
 
 #ifndef __barebox_riscv_head
 #define __barebox_riscv_head() \
-	__barebox_riscv_header("nop", 0x55555555FFFFFFFF, 0x0, "barebox", "RSCV")
+	__barebox_riscv_header("nop", 0x0, 0x0, "barebox", "RSCV")
 #endif
 
 #endif /* __ASM_RISCV_HEAD_H */
diff --git a/arch/riscv/mach-erizo/include/mach/debug_ll.h b/arch/riscv/include/asm/debug_ll.h
index a20acfcdfb..6904460af9 100644
--- a/arch/riscv/mach-erizo/include/mach/debug_ll.h
+++ b/arch/riscv/include/asm/debug_ll.h
@@ -1,18 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (C) 2017 Antony Pavlov <antonynpavlov@gmail.com>
- *
- * This file is part of barebox.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
  */
 
-#ifndef __MACH_ERIZO_DEBUG_LL__
-#define __MACH_ERIZO_DEBUG_LL__
+#ifndef __ASM_DEBUG_LL__
+#define __ASM_DEBUG_LL__
 
 /** @file
  *  This File contains declaration for early output support
@@ -20,6 +12,8 @@
 
 #include <linux/kconfig.h>
 
+#ifdef CONFIG_DEBUG_ERIZO
+
 #define DEBUG_LL_UART_ADDR	0x90000000
 #define DEBUG_LL_UART_SHIFT	2
 #define DEBUG_LL_UART_IOSIZE32
@@ -30,4 +24,24 @@
 
 #include <asm/debug_ll_ns16550.h>
 
-#endif /* __MACH_ERIZO_DEBUG_LL__ */
+#elif defined CONFIG_DEBUG_SIFIVE
+
+#include <io.h>
+
+static inline void PUTC_LL(char ch)
+{
+	void __iomem *uart0 = IOMEM(0x10010000);
+
+	while (readl(uart0) & 0x80000000)
+		;
+
+	writel(ch, uart0);
+}
+
+#endif
+
+#ifndef debug_ll_init
+#define debug_ll_init() (void)0
+#endif
+
+#endif /* __ASM_DEBUG_LL__ */
diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h
index 7d6d12df74..e208ef4fb1 100644
--- a/arch/riscv/include/asm/debug_ll_ns16550.h
+++ b/arch/riscv/include/asm/debug_ll_ns16550.h
@@ -35,19 +35,6 @@
 
 #endif /* CONFIG_DEBUG_LL */
 
-#define UART_THR	(0x0 << DEBUG_LL_UART_SHIFT)
-#define UART_RBR	(0x0 << DEBUG_LL_UART_SHIFT)
-#define UART_DLL	(0x0 << DEBUG_LL_UART_SHIFT)
-#define UART_DLM	(0x1 << DEBUG_LL_UART_SHIFT)
-#define UART_LCR	(0x3 << DEBUG_LL_UART_SHIFT)
-#define UART_LSR	(0x5 << DEBUG_LL_UART_SHIFT)
-
-#define UART_LCR_W	0x07	/* Set UART to 8,N,2 & DLAB = 0 */
-#define UART_LCR_DLAB	0x87	/* Set UART to 8,N,2 & DLAB = 1 */
-
-#define UART_LSR_DR	0x01    /* UART received data present */
-#define UART_LSR_THRE	0x20	/* Xmit holding register empty */
-
 #if defined(DEBUG_LL_UART_IOSIZE32)
 #define UART_REG_L	lw
 #define UART_REG_S	sw
@@ -62,31 +49,29 @@
 #error "Please define DEBUG_LL_UART_IOSIZE{8,32}"
 #endif
 
+#include <asm/ns16550.h>
+
 #ifndef __ASSEMBLY__
 /*
  * C macros
  */
 
-#include <asm/io.h>
-
 static inline void PUTC_LL(char ch)
 {
 #ifdef CONFIG_DEBUG_LL
-	while (!(__uart_read((u8 *)DEBUG_LL_UART_ADDR + UART_LSR) & UART_LSR_THRE))
-		;
-	__uart_write(ch, (u8 *)DEBUG_LL_UART_ADDR + UART_THR);
-#endif /* CONFIG_DEBUG_LL */
+	early_ns16550_putc(ch, DEBUG_LL_UART_ADDR, DEBUG_LL_UART_SHIFT,
+			   __uart_read, __uart_write);
+#endif
 }
 
 static inline void debug_ll_ns16550_init(void)
 {
 #ifdef CONFIG_DEBUG_LL
-	__uart_write(UART_LCR_DLAB, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR);
-	__uart_write(DEBUG_LL_UART_DIVISOR & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLL);
-	__uart_write((DEBUG_LL_UART_DIVISOR >> 8) & 0xff, (u8 *)DEBUG_LL_UART_ADDR + UART_DLM);
-	__uart_write(UART_LCR_W, (u8 *)DEBUG_LL_UART_ADDR + UART_LCR);
-#endif /* CONFIG_DEBUG_LL */
+	early_ns16550_init(DEBUG_LL_UART_ADDR, DEBUG_LL_UART_DIVISOR,
+			   DEBUG_LL_UART_SHIFT, __uart_write);
+#endif
 }
+
 #else /* __ASSEMBLY__ */
 /*
  * Macros for use in assembly language code
@@ -97,15 +82,15 @@ static inline void debug_ll_ns16550_init(void)
 	li	t0, DEBUG_LL_UART_ADDR
 
 	li	t1, UART_LCR_DLAB		/* DLAB on */
-	UART_REG_S	t1, UART_LCR(t0)		/* Write it out */
+	UART_REG_S	t1, UART_LCR(DEBUG_LL_UART_SHIFT)(t0)	/* Write it out */
 
 	li	t1, \divisor
-	UART_REG_S	t1, UART_DLL(t0)		/* write low order byte */
+	UART_REG_S	t1, UART_DLL(DEBUG_LL_UART_SHIFT)(t0)	/* write low order byte */
 	srl	t1, t1, 8
-	UART_REG_S	t1, UART_DLM(t0)		/* write high order byte */
+	UART_REG_S	t1, UART_DLM(DEBUG_LL_UART_SHIFT)(t0)	/* write high order byte */
 
 	li	t1, UART_LCR_W			/* DLAB off */
-	UART_REG_S	t1, UART_LCR(t0)		/* Write it out */
+	UART_REG_S	t1, UART_LCR(DEBUG_LL_UART_SHIFT)(t0)	/* Write it out */
 #endif /* CONFIG_DEBUG_LL */
 .endm
 
@@ -118,11 +103,11 @@ static inline void debug_ll_ns16550_init(void)
 	li	t0, DEBUG_LL_UART_ADDR
 
 201:
-	UART_REG_L	t1, UART_LSR(t0)	/* get line status */
+	UART_REG_L	t1, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)	/* get line status */
 	andi	t1, t1, UART_LSR_THRE	/* check for transmitter empty */
 	beqz	t1, 201b			/* try again */
 
-	UART_REG_S	a0, UART_THR(t0)	/* write the character */
+	UART_REG_S	a0, UART_THR(DEBUG_LL_UART_SHIFT)(t0)	/* write the character */
 
 #endif /* CONFIG_DEBUG_LL */
 .endm
@@ -158,7 +143,7 @@ static inline void debug_ll_ns16550_init(void)
 	li      t0, DEBUG_LL_UART_ADDR
 
 	/* get line status and check for data present */
-	UART_REG_L	s0, UART_LSR(t0)
+	UART_REG_L	s0, UART_LSR(DEBUG_LL_UART_SHIFT)(t0)
 	andi	s0, s0, UART_LSR_DR
 
 #endif /* CONFIG_DEBUG_LL */
@@ -177,10 +162,12 @@ static inline void debug_ll_ns16550_init(void)
 	beqz	s0, 204b
 
 	/* read a character */
-	UART_REG_L	s0, UART_RBR(t0)
+	UART_REG_L	s0, UART_RBR(DEBUG_LL_UART_SHIFT)(t0)
 
 #endif /* CONFIG_DEBUG_LL */
 .endm
 #endif /* __ASSEMBLY__ */
 
+#define debug_ll_init debug_ll_ns16550_init
+
 #endif /* __INCLUDE_RISCV_ASM_DEBUG_LL_NS16550_H__ */
diff --git a/arch/riscv/include/asm/ns16550.h b/arch/riscv/include/asm/ns16550.h
new file mode 100644
index 0000000000..7f56692b77
--- /dev/null
+++ b/arch/riscv/include/asm/ns16550.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2016, 2017 Antony Pavlov <antonynpavlov@gmail.com>
+ */
+
+/** @file
+ *  This file contains declaration for early output support
+ */
+#ifndef __ASM_NS16550_H__
+#define __ASM_NS16550_H__
+
+#include <linux/kconfig.h>
+
+#define UART_THR(shift)		(0x0 << shift)
+#define UART_RBR(shift)		(0x0 << shift)
+#define UART_DLL(shift)		(0x0 << shift)
+#define UART_DLM(shift)		(0x1 << shift)
+#define UART_LCR(shift)		(0x3 << shift)
+#define UART_LSR(shift)		(0x5 << shift)
+
+#define UART_LCR_W	0x07	/* Set UART to 8,N,2 & DLAB = 0 */
+#define UART_LCR_DLAB	0x87	/* Set UART to 8,N,2 & DLAB = 1 */
+
+#define UART_LSR_DR	0x01    /* UART received data present */
+#define UART_LSR_THRE	0x20	/* Xmit holding register empty */
+
+#ifndef __ASSEMBLY__
+
+#include <asm/io.h>
+
+#define early_ns16550_putc(ch, base, shift, readx, writex) \
+	do { \
+		while (!(readx((u8 *)base + UART_LSR(shift)) & UART_LSR_THRE)) \
+			; \
+		writex(ch, (u8 *)base + UART_THR(shift)); \
+	} while (0)
+
+#define early_ns16550_init(base, divisor, shift, writex) \
+	do { \
+		writex(UART_LCR_DLAB, (u8 *)base + UART_LCR(shift)); \
+		writex(divisor & 0xff, (u8 *)base + UART_DLL(shift)); \
+		writex((divisor >> 8) & 0xff, (u8 *)base + UART_DLM(shift)); \
+		writex(UART_LCR_W, (u8 *)base + UART_LCR(shift)); \
+	} while (0)
+
+#endif
+
+#endif
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 99895d9c3b..ab1fc9a128 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -89,11 +89,32 @@ struct sbiret {
 	long value;
 };
 
-void sbi_init(void);
-struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
-			unsigned long arg1, unsigned long arg2,
-			unsigned long arg3, unsigned long arg4,
-			unsigned long arg5);
+static inline struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+				      unsigned long arg1, unsigned long arg2,
+				      unsigned long arg3, unsigned long arg4,
+				      unsigned long arg5)
+{
+	struct sbiret ret;
+
+	register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
+	register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
+	register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
+	register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
+	register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
+	register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
+	register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
+	register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
+	asm volatile ("ecall"
+		      : "+r" (a0), "+r" (a1)
+		      : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
+		      : "memory");
+	ret.error = a0;
+	ret.value = a1;
+
+	return ret;
+}
+
+long __sbi_base_ecall(int fid);
 
 void sbi_console_putchar(int ch);
 int sbi_console_getchar(void);
@@ -148,6 +169,5 @@ static inline unsigned long sbi_minor_version(void)
 int sbi_err_map_linux_errno(int err);
 #else /* CONFIG_RISCV_SBI */
 static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; }
-static inline void sbi_init(void) {}
 #endif /* CONFIG_RISCV_SBI */
 #endif /* _ASM_RISCV_SBI_H */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index a4eaa1005d..a399de7399 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -6,3 +6,6 @@ obj-y += dtb.o
 obj-pbl-y += sections.o setupc.o reloc.o sections.o runtime-offset.o
 obj-$(CONFIG_HAS_ARCH_SJLJ) += setjmp.o longjmp.o
 obj-$(CONFIG_RISCV_OPTIMZED_STRING_FUNCTIONS) += memcpy.o memset.o memmove.o
+obj-$(CONFIG_RISCV_SBI) += sbi.o
+obj-$(CONFIG_CMD_RISCV_CPUINFO) += cpuinfo.o
+obj-$(CONFIG_BOOTM) += bootm.o
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
new file mode 100644
index 0000000000..b3e41de4a8
--- /dev/null
+++ b/arch/riscv/lib/bootm.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// SPDX-FileCopyrightText: 2018 Sascha Hauer <s.hauer@pengutronix.de>
+
+#include <common.h>
+#include <bootm.h>
+
+static int do_bootm_linux(struct image_data *data)
+{
+	void (*fn)(unsigned long a0, unsigned long dtb, unsigned long a2);
+	phys_addr_t devicetree;
+
+	fn = booti_load_image(data, &devicetree);
+	if (IS_ERR(fn))
+		return PTR_ERR(fn);
+
+	shutdown_barebox();
+
+	fn(0, devicetree, 0);
+
+	return -EINVAL;
+}
+
+static struct image_handler riscv_linux_handler = {
+        .name = "RISC-V Linux image",
+        .bootm = do_bootm_linux,
+        .filetype = filetype_riscv_linux_image,
+};
+
+static struct image_handler riscv_fit_handler = {
+	.name = "FIT image",
+	.bootm = do_bootm_linux,
+	.filetype = filetype_oftree,
+};
+
+static struct image_handler riscv_barebox_handler = {
+        .name = "RISC-V barebox image",
+        .bootm = do_bootm_linux,
+        .filetype = filetype_riscv_barebox_image,
+};
+
+static int riscv_register_image_handler(void)
+{
+	register_image_handler(&riscv_linux_handler);
+	register_image_handler(&riscv_barebox_handler);
+
+	if (IS_ENABLED(CONFIG_FITIMAGE))
+		register_image_handler(&riscv_fit_handler);
+
+	return 0;
+}
+late_initcall(riscv_register_image_handler);
diff --git a/arch/riscv/lib/cpuinfo.c b/arch/riscv/lib/cpuinfo.c
new file mode 100644
index 0000000000..21b99a990a
--- /dev/null
+++ b/arch/riscv/lib/cpuinfo.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-only
+#include <common.h>
+#include <command.h>
+#include <asm/sbi.h>
+
+static const char *implementations[] = {
+	[0] = "\"Berkeley Boot Loader (BBL)\" ",
+	[1] = "\"OpenSBI\" ",
+	[2] = "\"Xvisor\" ",
+	[3] = "\"KVM\" ",
+	[4] = "\"RustSBI\" ",
+	[5] = "\"Diosix\" ",
+};
+
+static int do_cpuinfo(int argc, char *argv[])
+{
+	const char *implementation = "";
+	unsigned long impid;
+
+	printf("SBI specification v%lu.%lu detected\n",
+	       sbi_major_version(), sbi_minor_version());
+
+	if (sbi_spec_is_0_1())
+		return 0;
+
+	impid = __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_ID);
+	if (impid < ARRAY_SIZE(implementations))
+		implementation = implementations[impid];
+
+	printf("SBI implementation ID=0x%lx %sVersion=0x%lx\n",
+	       impid, implementation, __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION));
+
+	printf("SBI Machine VENDORID=0x%lx ARCHID=0x%lx MIMPID=0x%lx\n",
+	       __sbi_base_ecall(SBI_EXT_BASE_GET_MVENDORID),
+	       __sbi_base_ecall(SBI_EXT_BASE_GET_MARCHID),
+	       __sbi_base_ecall(SBI_EXT_BASE_GET_MIMPID));
+
+	return 0;
+}
+
+BAREBOX_CMD_START(cpuinfo)
+	.cmd            = do_cpuinfo,
+BAREBOX_CMD_DESC("show CPU information")
+BAREBOX_CMD_GROUP(CMD_GRP_INFO)
+	BAREBOX_CMD_END
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
new file mode 100644
index 0000000000..973c9d9d0f
--- /dev/null
+++ b/arch/riscv/lib/sbi.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * SBI initialilization and all extension implementation.
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ */
+
+#include <asm/sbi.h>
+#include <linux/export.h>
+#include <errno.h>
+#include <init.h>
+
+/* default SBI version is 0.1 */
+unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
+EXPORT_SYMBOL(sbi_spec_version);
+
+int sbi_err_map_linux_errno(int err)
+{
+	switch (err) {
+	case SBI_SUCCESS:
+		return 0;
+	case SBI_ERR_DENIED:
+		return -EPERM;
+	case SBI_ERR_INVALID_PARAM:
+		return -EINVAL;
+	case SBI_ERR_INVALID_ADDRESS:
+		return -EFAULT;
+	case SBI_ERR_NOT_SUPPORTED:
+	case SBI_ERR_FAILURE:
+	default:
+		return -ENOTSUPP;
+	};
+}
+EXPORT_SYMBOL(sbi_err_map_linux_errno);
+
+long __sbi_base_ecall(int fid)
+{
+	struct sbiret ret;
+
+	ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0);
+	if (!ret.error)
+		return ret.value;
+	else
+		return sbi_err_map_linux_errno(ret.error);
+}
+
+static inline long sbi_get_spec_version(void)
+{
+	return __sbi_base_ecall(SBI_EXT_BASE_GET_SPEC_VERSION);
+}
+
+static int sbi_init(void)
+{
+	int ret;
+
+	ret = sbi_get_spec_version();
+	if (ret > 0)
+		sbi_spec_version = ret;
+	return 0;
+
+}
+core_initcall(sbi_init);
diff --git a/arch/riscv/mach-erizo/Kconfig b/arch/riscv/mach-erizo/Kconfig
deleted file mode 100644
index 2400b4437b..0000000000
--- a/arch/riscv/mach-erizo/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if MACH_ERIZO
-
-choice
-	prompt "Board type"
-
-config BOARD_ERIZO_GENERIC
-	bool "erizo generic board"
-
-endchoice
-
-endif
diff --git a/arch/riscv/mach-erizo/Makefile b/arch/riscv/mach-erizo/Makefile
deleted file mode 100644
index d9c51e74c3..0000000000
--- a/arch/riscv/mach-erizo/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# just to build a built-in.o. Otherwise compilation fails when no o-files is
-# created.
-obj- += dummy.o
diff --git a/arch/riscv/mach-virt/Makefile b/arch/riscv/mach-virt/Makefile
deleted file mode 100644
index d9c51e74c3..0000000000
--- a/arch/riscv/mach-virt/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# just to build a built-in.o. Otherwise compilation fails when no o-files is
-# created.
-obj- += dummy.o
diff --git a/arch/riscv/mach-virt/include/mach/debug_ll.h b/arch/riscv/mach-virt/include/mach/debug_ll.h
deleted file mode 100644
index 056b7a330b..0000000000
--- a/arch/riscv/mach-virt/include/mach/debug_ll.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2017 Antony Pavlov <antonynpavlov@gmail.com>
- */
-
-#ifndef __MACH_VIRT_DEBUG_LL__
-#define __MACH_VIRT_DEBUG_LL__
-
-/** @file
- *  This File contains declaration for early output support
- */
-
-#include <linux/kconfig.h>
-
-#define DEBUG_LL_UART_ADDR	0x10000000
-#define DEBUG_LL_UART_SHIFT	0
-#define DEBUG_LL_UART_IOSIZE8
-
-#define DEBUG_LL_UART_CLK       0x00384000
-#define DEBUG_LL_UART_BPS       CONFIG_BAUDRATE
-#define DEBUG_LL_UART_DIVISOR   (DEBUG_LL_UART_CLK / DEBUG_LL_UART_BPS)
-
-#include <asm/debug_ll_ns16550.h>
-
-#endif /* __MACH_VIRT_DEBUG_LL__ */