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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-12-08 14:53:59 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-12-08 14:53:59 +0100 |
| commit | d3933bd3501bb31c696bee25e183b5511c49759a (patch) | |
| tree | b5018ed9c1ca9d92bcb54873265d1da497f6c295 /arch | |
| parent | 4b59e92dc74496a6f7d06e5fed75a32f0a317281 (diff) | |
| parent | ef8a47a6e779747ecd83b70120eae0af35a116f3 (diff) | |
| download | barebox-d3933bd3501bb31c696bee25e183b5511c49759a.tar.gz barebox-d3933bd3501bb31c696bee25e183b5511c49759a.tar.xz | |
Merge branch 'for-next/marvell'
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-mvebu/armada-370-xp.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h | 7 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index 57f6a5fe0d..244f8cdd81 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -74,6 +74,11 @@ static int armada_370_xp_init_soc(struct device_node *root, void *context) mvebu_set_memory(phys_base, phys_size); + /* Enable peripherals PUP */ + reg = readl(ARMADA_XP_PUP_ENABLE_BASE); + reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN; + writel(reg, ARMADA_XP_PUP_ENABLE_BASE); + return 0; } diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h index ccc687c03b..bac27e5a26 100644 --- a/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h +++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp-regs.h @@ -30,6 +30,13 @@ #define SAR_TCLK_FREQ BIT(20) #define SAR_HIGH 0x04 +#define ARMADA_XP_PUP_ENABLE_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x1864c) +#define GE0_PUP_EN BIT(0) +#define GE1_PUP_EN BIT(1) +#define LCD_PUP_EN BIT(2) +#define NAND_PUP_EN BIT(4) +#define SPI_PUP_EN BIT(5) + #define ARMADA_370_XP_SDRAM_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20000) #define DDR_BASE_CS 0x180 #define DDR_BASE_CSn(n) (DDR_BASE_CS + ((n) * 0x8)) |