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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2014-12-11 21:51:33 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-12-15 10:58:34 +0100 |
| commit | e190bcf14d02aa21c08b71930de809017f616c3c (patch) | |
| tree | bb925d0f8e00175a9d1c2cb1fd63039bb2bb9d92 /arch | |
| parent | 35f614ec601ae0eaf1586cbfa60340084fbd6faa (diff) | |
| download | barebox-e190bcf14d02aa21c08b71930de809017f616c3c.tar.gz barebox-e190bcf14d02aa21c08b71930de809017f616c3c.tar.xz | |
arm/cpu/lowlevel: Don't save the return address in another register
The corresponding code doesn't use the lr register (neither explicitly
nor implicitly by the bl instruction), so there is no gain in using r2
here.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/lowlevel.S | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S index de7afba2c3..b76222d8f3 100644 --- a/arch/arm/cpu/lowlevel.S +++ b/arch/arm/cpu/lowlevel.S @@ -4,7 +4,6 @@ .section ".text_bare_init_","ax" ENTRY(arm_cpu_lowlevel_init) - mov r2, lr /* set the cpu to SVC32 mode, mask irq and fiq */ mrs r12, cpsr bic r12, r12, #0x1f @@ -55,5 +54,5 @@ ENTRY(arm_cpu_lowlevel_init) mcr p15, 0, r12, c1, c0, 0 /* SCTLR */ - mov pc, r2 + mov pc, lr ENDPROC(arm_cpu_lowlevel_init) |