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| author | Stefan Christ <s.christ@phytec.de> | 2015-11-06 11:21:55 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-11-09 07:38:53 +0100 |
| commit | ec8b0e4afd0236984b4760efb905f7f8a81271c9 (patch) | |
| tree | 0b58a32320507287bd3c546f48a19289a1c49c13 /arch | |
| parent | fecd788e56d3586055b8e19fb4ae106abcae54bd (diff) | |
| download | barebox-ec8b0e4afd0236984b4760efb905f7f8a81271c9.tar.gz barebox-ec8b0e4afd0236984b4760efb905f7f8a81271c9.tar.xz | |
ARM: imx6dl: pfla02: Add support for 128MB and 256MB RAM
Add support for phyFLEX-i.MX6 Solo with 128MB and 256MB RAM on one
memory bank.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
3 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg new file mode 100644 index 0000000000..26fe2b2f7d --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x3c409b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x0000000B; \ + wm 32 0x021b0000 0x82180000 + +#include "flash-header-phytec-pfla02dl.h" diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg new file mode 100644 index 0000000000..babb0dfe24 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x3c409b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x0000000F; \ + wm 32 0x021b0000 0x82190000 + +#include "flash-header-phytec-pfla02dl.h" diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index beb9be6621..c6c3dd67ec 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -40,6 +40,8 @@ static inline void setup_uart(void) #define SZ_4G 0xEFFFFFF8 +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_128M, IMD_TYPE_PARAMETER, "memsize=128", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_256M, IMD_TYPE_PARAMETER, "memsize=256", 0); BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_512M, IMD_TYPE_PARAMETER, "memsize=512", 0); BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0); BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0); @@ -83,6 +85,8 @@ PHYTEC_ENTRY(start_phytec_pbab01_1gib_1bank, imx6q_phytec_pbab01, SZ_1G, true); PHYTEC_ENTRY(start_phytec_pbab01_2gib, imx6q_phytec_pbab01, SZ_2G, true); PHYTEC_ENTRY(start_phytec_pbab01_4gib, imx6q_phytec_pbab01, SZ_4G, true); PHYTEC_ENTRY(start_phytec_pbab01dl_1gib, imx6dl_phytec_pbab01, SZ_1G, false); +PHYTEC_ENTRY(start_phytec_pbab01s_128mb_1bank, imx6s_phytec_pbab01, SZ_128M, false); +PHYTEC_ENTRY(start_phytec_pbab01s_256mb_1bank, imx6s_phytec_pbab01, SZ_256M, false); PHYTEC_ENTRY(start_phytec_pbab01s_512mb_1bank, imx6s_phytec_pbab01, SZ_512M, false); PHYTEC_ENTRY(start_phytec_phyboard_alcor_1gib, imx6q_phytec_phyboard_alcor, SZ_1G, false); PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb_1bank, imx6dl_phytec_phyboard_subra, SZ_512M, false); |