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| author | Antony Pavlov <antonynpavlov@gmail.com> | 2013-01-26 20:52:37 +0400 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-01-27 22:41:27 +0100 |
| commit | ee3e2a83927dc4123e3acd970ccfcad2b6a4d059 (patch) | |
| tree | 7504063ef5c74904be3eb5b625321a7ca2ff981d /arch | |
| parent | 1e8c9c5a4a1927b8e94769945d5d436ef9aa0754 (diff) | |
| download | barebox-ee3e2a83927dc4123e3acd970ccfcad2b6a4d059.tar.gz barebox-ee3e2a83927dc4123e3acd970ccfcad2b6a4d059.tar.xz | |
MIPS: introduce ram0 regions register function
On MIPS there are two segments in CPU address space that
can be used for untranslated memory access: KSEG0 and KSEG1.
KSEG0 is used for cached access and KSEG1 is used for
uncached one.
The instroduced mips_add_ram0() function registers two
address regions for memory access: one in KSEG0 and
the other one in KSEG1.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/memory.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/include/asm/memory.h b/arch/mips/include/asm/memory.h new file mode 100644 index 0000000000..2aa28b7686 --- /dev/null +++ b/arch/mips/include/asm/memory.h @@ -0,0 +1,12 @@ +#ifndef __ASM_MIPS_MEMORY_H +#define __ASM_MIPS_MEMORY_H + +#include <memory.h> +#include <asm/addrspace.h> + +static inline void mips_add_ram0(resource_size_t size) +{ + barebox_add_memory_bank("kseg0_ram0", KSEG0, size); + barebox_add_memory_bank("kseg1_ram0", KSEG1, size); +} +#endif /* __ASM_MIPS_MEMORY_H */ |