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authorAhmad Fatoum <a.fatoum@pengutronix.de>2022-01-08 18:15:19 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2022-01-12 11:21:53 +0100
commitfb44b6b8ffeae5dc6eb53a1664d4312615397349 (patch)
tree5f3c349ac20af3d8867cca5b7721dc132fadd8b2 /arch
parent3ab3ca1317974b53a488072d5212d2cdf589ae60 (diff)
downloadbarebox-fb44b6b8ffeae5dc6eb53a1664d4312615397349.tar.gz
barebox-fb44b6b8ffeae5dc6eb53a1664d4312615397349.tar.xz
RISC-V: virt: riscvemu: repurpose 64k low RAM for state/environment
TinyEMU's RISC-V machine emulates a 64K SRAM at address 0. First 4K page is unused, then a maximum of 0x40 bytes for boot ROM (trampoline that passes FDT), then the FDT. The remainder of the 64K is unused. Make use of that space for storing state and environment. We start the mtd-ram at 0x1000 to easily allow for a faulting zero page. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220108171524.587144-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/riscv/boards/riscvemu/Makefile1
-rw-r--r--arch/riscv/boards/riscvemu/board.c9
-rw-r--r--arch/riscv/boards/riscvemu/overlay-of-sram.dts119
-rw-r--r--arch/riscv/configs/virt32_defconfig1
-rw-r--r--arch/riscv/configs/virt64_defconfig1
5 files changed, 131 insertions, 0 deletions
diff --git a/arch/riscv/boards/riscvemu/Makefile b/arch/riscv/boards/riscvemu/Makefile
index dcfc2937d3..81fad4670f 100644
--- a/arch/riscv/boards/riscvemu/Makefile
+++ b/arch/riscv/boards/riscvemu/Makefile
@@ -1 +1,2 @@
obj-y += board.o
+obj-y += overlay-of-sram.dtb.o
diff --git a/arch/riscv/boards/riscvemu/board.c b/arch/riscv/boards/riscvemu/board.c
index 73d787a833..60c93716a2 100644
--- a/arch/riscv/boards/riscvemu/board.c
+++ b/arch/riscv/boards/riscvemu/board.c
@@ -7,6 +7,7 @@
#include <driver.h>
#include <poweroff.h>
#include <restart.h>
+#include <deep-probe.h>
#include <asm/system.h>
#include <asm/barebox-riscv.h>
@@ -28,12 +29,19 @@ static void __noreturn riscvemu_restart(struct restart_handler *rst)
priv->restart(riscv_hartid(), barebox_riscv_boot_dtb());
}
+extern char __dtb_overlay_of_sram_start[];
+
static int riscvemu_probe(struct device_d *dev)
{
struct device_node *of_chosen;
+ struct device_node *overlay;
struct riscvemu_priv *priv;
u64 start;
+ overlay = of_unflatten_dtb(__dtb_overlay_of_sram_start, INT_MAX);
+ of_overlay_apply_tree(dev->device_node, overlay);
+ /* of_probe() will happen later at of_populate_initcall */
+
of_chosen = of_find_node_by_path("/chosen");
if (of_property_read_u64(of_chosen, "riscv,kernel-start", &start))
@@ -52,6 +60,7 @@ static const struct of_device_id riscvemu_of_match[] = {
{ .compatible = "ucbbar,riscvemu-bar_dev" },
{ /* sentinel */ },
};
+BAREBOX_DEEP_PROBE_ENABLE(riscvemu_of_match);
static struct driver_d riscvemu_board_driver = {
.name = "board-riscvemu",
diff --git a/arch/riscv/boards/riscvemu/overlay-of-sram.dts b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
new file mode 100644
index 0000000000..839887fef2
--- /dev/null
+++ b/arch/riscv/boards/riscvemu/overlay-of-sram.dts
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target-path = "/soc";
+ __overlay__ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ sram@0 {
+ compatible = "mtd-ram";
+ reg = <0 0x1000 0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bootrom";
+ reg = <0x0 0x40>;
+ };
+
+ partition@40 {
+ label = "fdt";
+ reg = <0x40 0x1fc0>;
+ };
+
+ environment_sram: partition@3000 {
+ label = "barebox-environment";
+ reg = <0x3000 0xb000>;
+ };
+
+ backend_state_sram: partition@e000 {
+ label = "barebox-state";
+ reg = <0xe000 0x1000>;
+ };
+ };
+ };
+ };
+ };
+
+ fragment@2 {
+ target-path = "/chosen";
+ __overlay__ {
+ environment {
+ compatible = "barebox,environment";
+ device-path = "/soc/sram@0/partitions/partition@3000";
+ };
+ };
+ };
+
+ fragment@3 {
+ target-path = "/";
+ __overlay__ {
+ aliases {
+ state = "/state";
+ };
+
+ state {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "barebox,state";
+ magic = <0x290cf8c6>;
+ backend-type = "raw";
+ backend = <&backend_state_sram>;
+ backend-stridesize = <64>;
+
+ bootstate {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ system0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts@0 {
+ reg = <0x0 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+
+ priority@4 {
+ reg = <0x4 0x4>;
+ type = "uint32";
+ default = <20>;
+ };
+ };
+
+ system1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts@8 {
+ reg = <0x8 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+
+ priority@c {
+ reg = <0xc 0x4>;
+ type = "uint32";
+ default = <21>;
+ };
+ };
+
+ last_chosen@10 {
+ reg = <0x10 0x4>;
+ type = "uint32";
+ };
+ };
+ };
+ };
+ };
+};
diff --git a/arch/riscv/configs/virt32_defconfig b/arch/riscv/configs/virt32_defconfig
index bfea7771ef..28a20673e9 100644
--- a/arch/riscv/configs/virt32_defconfig
+++ b/arch/riscv/configs/virt32_defconfig
@@ -88,6 +88,7 @@ CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_M25P80=y
+CONFIG_MTD_MTDRAM=y
CONFIG_DRIVER_CFI=y
CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
CONFIG_DISK=y
diff --git a/arch/riscv/configs/virt64_defconfig b/arch/riscv/configs/virt64_defconfig
index 2ddc174b8a..17588f61fa 100644
--- a/arch/riscv/configs/virt64_defconfig
+++ b/arch/riscv/configs/virt64_defconfig
@@ -89,6 +89,7 @@ CONFIG_MTD=y
# CONFIG_MTD_OOB_DEVICE is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_M25P80=y
+CONFIG_MTD_MTDRAM=y
CONFIG_DRIVER_CFI=y
CONFIG_DRIVER_CFI_BANK_WIDTH_8=y
CONFIG_DISK=y