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| author | Matthias Kaehlcke <matthias@kaehlcke.net> | 2010-02-10 20:56:15 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-02-12 08:03:26 +0100 |
| commit | c5b99bce5dafc36b3eec7b3b1aa337f1010db2a0 (patch) | |
| tree | 9b33ec127a511a6d3d097afe8507f048342a1559 /board | |
| parent | 867673621876546cb7b846dab3128ef836aa9586 (diff) | |
| download | barebox-c5b99bce5dafc36b3eec7b3b1aa337f1010db2a0.tar.gz barebox-c5b99bce5dafc36b3eec7b3b1aa337f1010db2a0.tar.xz | |
edb93xx: Fix SDRAM initialization
Before programming the SDRAM mode registers, mode register update mode must be
selected by setting the MRS bit and clearing INIT in GlConfig
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'board')
| -rw-r--r-- | board/edb93xx/sdram_cfg.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/edb93xx/sdram_cfg.c b/board/edb93xx/sdram_cfg.c index 9f56f7272c..25b214be4b 100644 --- a/board/edb93xx/sdram_cfg.c +++ b/board/edb93xx/sdram_cfg.c @@ -111,6 +111,11 @@ static void setup_refresh_timer(void) static void program_mode_registers(void) { + struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE; + + /* Select mode register update mode */ + writel(GLCONFIG_MRS | GLCONFIG_CKE, &sdram->glconfig); + PROGRAM_MODE_REG(0); #if (CONFIG_EP93XX_SDRAM_NUM_BANKS >= 2) |