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| author | Stefan Roese <sr@denx.de> | 2007-01-06 15:56:13 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-01-06 15:56:13 +0100 |
| commit | f16c1da9577f06c5fc08651a4065537407de4635 (patch) | |
| tree | 9f9a628ee787188221f7345d8fbbda89a71a6cee /board | |
| parent | cd1d937f90250a32988c37b2b4af8364d25de8ed (diff) | |
| download | barebox-f16c1da9577f06c5fc08651a4065537407de4635.tar.gz barebox-f16c1da9577f06c5fc08651a4065537407de4635.tar.xz | |
[PATCH] Update ALPR board files
This update brings the ALPR board support to the newest version.
It also fixes a problem with the NAND driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
| -rw-r--r-- | board/prodrive/alpr/alpr.c | 27 | ||||
| -rw-r--r-- | board/prodrive/alpr/nand.c | 4 |
2 files changed, 11 insertions, 20 deletions
diff --git a/board/prodrive/alpr/alpr.c b/board/prodrive/alpr/alpr.c index 2389561271..5abc87dde6 100644 --- a/board/prodrive/alpr/alpr.c +++ b/board/prodrive/alpr/alpr.c @@ -77,8 +77,12 @@ int board_early_init_f (void) mtdcr (uicb0tr, 0x00000000); /* */ mtdcr (uicb0vr, 0x00000001); /* */ + /* Setup shutdown/SSD empty interrupt as inputs */ + out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_SHUTDOWN | CFG_GPIO_SSD_EMPTY)); + out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_SHUTDOWN | CFG_GPIO_SSD_EMPTY)); + /* Setup GPIO/IRQ multiplexing */ - mtsdr(sdr_pfc0, 0x01a03e00); + mtsdr(sdr_pfc0, 0x01a33e00); return 0; } @@ -105,26 +109,11 @@ int last_stage_init(void) static int board_rev(void) { - int rev; - u32 pfc0; - - /* Setup GPIO14 & 15 as GPIO */ - mfsdr(sdr_pfc0, pfc0); - pfc0 |= CFG_GPIO_REV0 | CFG_GPIO_REV1; - mtsdr(sdr_pfc0, pfc0); - /* Setup as input */ - out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV0)); - out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV0)); - - rev = (in32(GPIO0_IR) >> 16) & 0x3; - - /* Setup GPIO14 & 15 as non GPIO again */ - mfsdr(sdr_pfc0, pfc0); - pfc0 &= ~(CFG_GPIO_REV0 | CFG_GPIO_REV1); - mtsdr(sdr_pfc0, pfc0); + out32(GPIO0_TCR, in32(GPIO0_TCR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV1)); + out32(GPIO0_ODR, in32(GPIO0_ODR) & ~(CFG_GPIO_REV0 | CFG_GPIO_REV1)); - return rev; + return (in32(GPIO0_IR) >> 16) & 0x3; } int checkboard (void) diff --git a/board/prodrive/alpr/nand.c b/board/prodrive/alpr/nand.c index e63c921eff..d66b08847a 100644 --- a/board/prodrive/alpr/nand.c +++ b/board/prodrive/alpr/nand.c @@ -154,7 +154,7 @@ static int alpr_nand_dev_ready(struct mtd_info *mtd) return 1; } -void board_nand_init(struct nand_chip *nand) +int board_nand_init(struct nand_chip *nand) { alpr_ndfc = (struct alpr_ndfc_regs *)CFG_NAND_BASE; @@ -169,5 +169,7 @@ void board_nand_init(struct nand_chip *nand) nand->read_buf = alpr_nand_read_buf; nand->verify_buf = alpr_nand_verify_buf; nand->dev_ready = alpr_nand_dev_ready; + + return 0; } #endif |