svn_rev_526

CFG_CACHELINESIZE -> CONFIG_CACHELINE_SIZE

17 files changed, 40 insertions, 40 deletions

diff --git a/cpu/74xx_7xx/kgdb.S b/cpu/74xx_7xx/kgdb.S
index e838513c1d..ce632d0e50 100644
--- a/cpu/74xx_7xx/kgdb.S
+++ b/cpu/74xx_7xx/kgdb.S
@@ -43,7 +43,7 @@ kgdb_flush_cache_all:
 	addis	r4,r0,0x0040
 kgdb_flush_loop:
 	lwz	r5,0(r3)
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_CACHELINE_SIZE
 	cmp	0,0,r3,r4
 	bne	kgdb_flush_loop
 	SYNC
@@ -55,7 +55,7 @@ kgdb_flush_loop:
 
 	.globl	kgdb_flush_cache_range
 kgdb_flush_cache_range:
-	li	r5,CFG_CACHELINE_SIZE-1
+	li	r5,CONFIG_CACHELINE_SIZE-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
 	add	r4,r4,r5
@@ -64,12 +64,12 @@ kgdb_flush_cache_range:
 	mtctr	r4
 	mr	r6,r3
 1:	dcbst	0,r3
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_CACHELINE_SIZE
 	bdnz	1b
 	sync				/* wait for dcbst's to get to ram */
 	mtctr	r4
 2:	icbi	0,r6
-	addi	r6,r6,CFG_CACHELINE_SIZE
+	addi	r6,r6,CONFIG_CACHELINE_SIZE
 	bdnz	2b
 	SYNC
 	blr
diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index 11430388f5..4822741e03 100644
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -616,7 +616,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
@@ -643,7 +643,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 #else
 	cmplw	cr1,r3,r4
 	addi	r0,r5,3
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
index e29b47d8c8..58d17d89b4 100644
--- a/cpu/ixp/npe/npe.c
+++ b/cpu/ixp/npe/npe.c
@@ -48,7 +48,7 @@ static int npe_exists[NPE_NUM_PORTS];
 static int npe_used[NPE_NUM_PORTS];
 
 /* A little extra so we can align to cacheline. */
-static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CFG_CACHELINE_SIZE - 1];
+static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CONFIG_CACHELINE_SIZE - 1];
 static u8 *npe_alloc_end;
 static u8 *npe_alloc_free;
 
@@ -57,7 +57,7 @@ static void *npe_alloc(int size)
 	static int count = 0;
 	void *p = NULL;
 
-	size = (size + (CFG_CACHELINE_SIZE-1)) & ~(CFG_CACHELINE_SIZE-1);
+	size = (size + (CONFIG_CACHELINE_SIZE-1)) & ~(CONFIG_CACHELINE_SIZE-1);
 	count++;
 
 	if ((npe_alloc_free + size) < npe_alloc_end) {
@@ -396,7 +396,7 @@ static int npe_init(struct eth_device *dev, bd_t * bis)
 
 	npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
 	npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
-				 CFG_CACHELINE_SIZE - 1) & ~(CFG_CACHELINE_SIZE - 1));
+				 CONFIG_CACHELINE_SIZE - 1) & ~(CONFIG_CACHELINE_SIZE - 1));
 
 	/* initialize mbuf pool */
 	init_rx_mbufs(p_npe);
@@ -614,8 +614,8 @@ int npe_initialize(bd_t * bis)
 
 			npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool);
 			npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool +
-						 CFG_CACHELINE_SIZE - 1)
-						& ~(CFG_CACHELINE_SIZE - 1));
+						 CONFIG_CACHELINE_SIZE - 1)
+						& ~(CONFIG_CACHELINE_SIZE - 1));
 
 			if (!npe_csr_load())
 				return 0;
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index aad76e0afb..9033a1fadd 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -128,7 +128,7 @@ mips_cache_reset:
 
 	li	t2, CFG_ICACHE_SIZE
 	li	t3, CFG_DCACHE_SIZE
-	li	t4, CFG_CACHELINE_SIZE
+	li	t4, CONFIG_CACHELINE_SIZE
 	move	t5, t4
 
 
@@ -261,7 +261,7 @@ mips_cache_lock:
 	li	a1, K0BASE - CACHE_LOCK_SIZE
 	addu	a0, a1
 	li	a2, CACHE_LOCK_SIZE
-	li	a3, CFG_CACHELINE_SIZE
+	li	a3, CONFIG_CACHELINE_SIZE
 	move	a1, a2
 	icacheop(a0,a1,a2,a3,0x1d)
 
diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c
index 2f01d5ce99..a7de4a2268 100644
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -125,7 +125,7 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
 
 	/* Set cache line size */
 	*(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) |
-		(CFG_CACHELINE_SIZE / 4);
+		(CONFIG_CACHELINE_SIZE / 4);
 
 	/* Map MBAR to PCI space */
 	*(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR;
diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S
index 0d62258818..4e068ee50d 100644
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -327,7 +327,7 @@ calc_source:
 	lis	r5, __init_size@h		/* Size         	*/
 	ori	r5, r5, __init_size@l
 
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/mpc8220/start.S b/cpu/mpc8220/start.S
index 52332023ec..9d107c7db8 100644
--- a/cpu/mpc8220/start.S
+++ b/cpu/mpc8220/start.S
@@ -551,7 +551,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE	/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE	/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S
index 9a4f94b918..1ce8572152 100644
--- a/cpu/mpc824x/start.S
+++ b/cpu/mpc824x/start.S
@@ -468,7 +468,7 @@ relocate_code:
 #endif
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/mpc8260/kgdb.S b/cpu/mpc8260/kgdb.S
index 2a250249b8..04cc944369 100644
--- a/cpu/mpc8260/kgdb.S
+++ b/cpu/mpc8260/kgdb.S
@@ -50,7 +50,7 @@ kgdb_flush_cache_all:
 
 	.globl	kgdb_flush_cache_range
 kgdb_flush_cache_range:
-	li	r5,CFG_CACHELINE_SIZE-1
+	li	r5,CONFIG_CACHELINE_SIZE-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
 	add	r4,r4,r5
@@ -59,12 +59,12 @@ kgdb_flush_cache_range:
 	mtctr	r4
 	mr	r6,r3
 1:	dcbst	0,r3
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_CACHELINE_SIZE
 	bdnz	1b
 	sync				/* wait for dcbst's to get to ram */
 	mtctr	r4
 2:	icbi	0,r6
-	addi	r6,r6,CFG_CACHELINE_SIZE
+	addi	r6,r6,CONFIG_CACHELINE_SIZE
 	bdnz	2b
 	SYNC
 	blr
diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S
index 2e93bbbb86..58d1731323 100644
--- a/cpu/mpc8260/start.S
+++ b/cpu/mpc8260/start.S
@@ -811,7 +811,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 3431adad41..f346d254cf 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -904,7 +904,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size */
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size */
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 310c9dfef6..5210a4dd38 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -922,7 +922,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5,GOT(__init_end)
 	sub	r5,r5,r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index b1d5fd4f48..beaddf6b1f 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -816,7 +816,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
@@ -843,7 +843,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 #else
 	cmplw	cr1,r3,r4
 	addi	r0,r5,3
diff --git a/cpu/mpc8xx/kgdb.S b/cpu/mpc8xx/kgdb.S
index 11c3c69339..a660f90ccf 100644
--- a/cpu/mpc8xx/kgdb.S
+++ b/cpu/mpc8xx/kgdb.S
@@ -52,7 +52,7 @@ kgdb_flush_cache_all:
 
 	.globl	kgdb_flush_cache_range
 kgdb_flush_cache_range:
-	li	r5,CFG_CACHELINE_SIZE-1
+	li	r5,CONFIG_CACHELINE_SIZE-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
 	add	r4,r4,r5
@@ -61,12 +61,12 @@ kgdb_flush_cache_range:
 	mtctr	r4
 	mr	r6,r3
 1:	dcbst	0,r3
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_CACHELINE_SIZE
 	bdnz	1b
 	sync				/* wait for dcbst's to get to ram */
 	mtctr	r4
 2:	icbi	0,r6
-	addi	r6,r6,CFG_CACHELINE_SIZE
+	addi	r6,r6,CONFIG_CACHELINE_SIZE
 	bdnz	2b
 	SYNC
 	blr
diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S
index ccd3c01aa6..aa4b3a4237 100644
--- a/cpu/mpc8xx/start.S
+++ b/cpu/mpc8xx/start.S
@@ -490,7 +490,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer:
diff --git a/cpu/ppc4xx/kgdb.S b/cpu/ppc4xx/kgdb.S
index be283403e9..b5962d2ea6 100644
--- a/cpu/ppc4xx/kgdb.S
+++ b/cpu/ppc4xx/kgdb.S
@@ -56,7 +56,7 @@ kgdb_flush_cache_all:
 
 	.globl	kgdb_flush_cache_range
 kgdb_flush_cache_range:
-	li	r5,CFG_CACHELINE_SIZE-1
+	li	r5,CONFIG_CACHELINE_SIZE-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
 	add	r4,r4,r5
@@ -65,12 +65,12 @@ kgdb_flush_cache_range:
 	mtctr	r4
 	mr	r6,r3
 1:	dcbst	0,r3
-	addi	r3,r3,CFG_CACHELINE_SIZE
+	addi	r3,r3,CONFIG_CACHELINE_SIZE
 	bdnz	1b
 	sync			/* wait for dcbst's to get to ram */
 	mtctr	r4
 2:	icbi	0,r6
-	addi	r6,r6,CFG_CACHELINE_SIZE
+	addi	r6,r6,CONFIG_CACHELINE_SIZE
 	bdnz	2b
 	SYNC
 	blr
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 25acd006ca..e93a8138f6 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1093,13 +1093,13 @@ invalidate_icache:
 invalidate_dcache:
 	addi	r6,0,0x0000		/* clear GPR 6 */
 	/* Do loop for # of dcache congruence classes. */
-	lis	r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@ha	/* TBS for large sized cache */
-	ori	r7, r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@l
+	lis	r7, (CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@ha	/* TBS for large sized cache */
+	ori	r7, r7, (CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@l
 					/* NOTE: dccci invalidates both */
 	mtctr	r7			/* ways in the D cache */
 ..dcloop:
 	dccci	0,r6			/* invalidate line */
-	addi	r6,r6, CFG_CACHELINE_SIZE /* bump to next line */
+	addi	r6,r6, CONFIG_CACHELINE_SIZE /* bump to next line */
 	bdnz	..dcloop
 	blr
 
@@ -1115,8 +1115,8 @@ flush_dcache:
 	mtdccr	r10
 
 	/* do loop for # of congruence classes. */
-	lis	r10,(CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@ha	/* TBS: for large cache sizes */
-	ori	r10,r10,(CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@l
+	lis	r10,(CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@ha	/* TBS: for large cache sizes */
+	ori	r10,r10,(CFG_DCACHE_SIZE / CONFIG_CACHELINE_SIZE / 2)@l
 	lis	r11,(CFG_DCACHE_SIZE / 2)@ha /* D cache set size - 2 way sets */
 	ori	r11,r11,(CFG_DCACHE_SIZE / 2)@l /* D cache set size - 2 way sets */
 	mtctr	r10
@@ -1126,8 +1126,8 @@ flush_dcache:
 	lwz	r3,0(r10)		/* least recently used side */
 	lwz	r3,0(r11)		/* the other side */
 	dccci	r0,r11			/* invalidate both sides */
-	addi	r10,r10,CFG_CACHELINE_SIZE /* bump to next line */
-	addi	r11,r11,CFG_CACHELINE_SIZE /* bump to next line */
+	addi	r10,r10,CONFIG_CACHELINE_SIZE /* bump to next line */
+	addi	r11,r11,CONFIG_CACHELINE_SIZE /* bump to next line */
 	bdnz	..flush_dcache_loop
 	sync				/* allow memory access to complete */
 	mtdccr	r9			/* restore dccr */
@@ -1365,7 +1365,7 @@ relocate_code:
 	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
-	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size	*/
+	li	r6, CONFIG_CACHELINE_SIZE		/* Cache Line Size	*/
 
 	/*
 	 * Fix GOT pointer: