diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2007-07-05 18:02:14 +0200 |
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committer | Sascha Hauer <sha@octopus.labnet.pengutronix.de> | 2007-07-05 18:02:14 +0200 |
commit | b2c5310d4da56237571bb8ea8d24b030c941030f (patch) | |
tree | c2c39f8c1ebdad8c3e69af86cb3c105434212edd /cpu | |
parent | fda840672d0eb662ddf4c7080532fe2dfeb0b0b1 (diff) | |
download | barebox-b2c5310d4da56237571bb8ea8d24b030c941030f.tar.gz barebox-b2c5310d4da56237571bb8ea8d24b030c941030f.tar.xz |
svn_rev_653
restructure tree, add reginfo command
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/mpc5xx/reginfo.c | 37 | ||||
-rw-r--r-- | cpu/mpc5xxx/Makefile | 22 | ||||
-rw-r--r-- | cpu/mpc5xxx/cpu.c | 2 | ||||
-rw-r--r-- | cpu/mpc5xxx/cpu_init.c | 2 | ||||
-rw-r--r-- | cpu/mpc5xxx/loadtask.c | 2 | ||||
-rw-r--r-- | cpu/mpc5xxx/reginfo.c | 59 | ||||
-rw-r--r-- | cpu/mpc5xxx/speed.c | 2 | ||||
-rw-r--r-- | cpu/mpc5xxx/start.S | 2 | ||||
-rw-r--r-- | cpu/ppc4xx/reginfo_405ep.c | 68 | ||||
-rw-r--r-- | cpu/ppc4xx/reginfo_405gp.c | 91 |
10 files changed, 272 insertions, 15 deletions
diff --git a/cpu/mpc5xx/reginfo.c b/cpu/mpc5xx/reginfo.c new file mode 100644 index 0000000000..e4765fe2b3 --- /dev/null +++ b/cpu/mpc5xx/reginfo.c @@ -0,0 +1,37 @@ +#include <common.h> + +void reginfo(void) +{ + volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile memctl5xx_t *memctl = &immap->im_memctl; + volatile sysconf5xx_t *sysconf = &immap->im_siu_conf; + volatile sit5xx_t *timers = &immap->im_sit; + volatile car5xx_t *car = &immap->im_clkrst; + volatile uimb5xx_t *uimb = &immap->im_uimb; + + puts ("\nSystem Configuration registers\n"); + printf("\tIMMR\t0x%08X\tSIUMCR\t0x%08X \n", get_immr(0), sysconf->sc_siumcr); + printf("\tSYPCR\t0x%08X\tSWSR\t0x%04X \n" ,sysconf->sc_sypcr, sysconf->sc_swsr); + printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X \n", sysconf->sc_sipend, sysconf->sc_simask); + printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X \n", sysconf->sc_siel, sysconf->sc_sivec); + printf("\tTESR\t0x%08X\n", sysconf->sc_tesr); + + puts ("\nMemory Controller Registers\n"); + printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0); + printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1); + printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2); + printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3); + printf("\tDMBR\t0x%08X\tDMOR\t0x%08X \n", memctl->memc_dmbr, memctl->memc_dmor ); + printf("\tMSTAT\t0x%08X\n", memctl->memc_mstat); + + puts ("\nSystem Integration Timers\n"); + printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", timers->sit_tbscr, timers->sit_rtcsc); + printf("\tPISCR\t0x%08X \n", timers->sit_piscr); + + puts ("\nClocks and Reset\n"); + printf("\tSCCR\t0x%08X\tPLPRCR\t0x%08X \n", car->car_sccr, car->car_plprcr); + + puts ("\nU-Bus to IMB3 Bus Interface\n"); + printf("\tUMCR\t0x%08X\tUIPEND\t0x%08X \n", uimb->uimb_umcr, uimb->uimb_uipend); + puts ("\n\n"); +} diff --git a/cpu/mpc5xxx/Makefile b/cpu/mpc5xxx/Makefile index dde8ace473..c78ddf71de 100644 --- a/cpu/mpc5xxx/Makefile +++ b/cpu/mpc5xxx/Makefile @@ -1,12 +1,14 @@ -obj-y += cpu.o -obj-y += cpu_init.o -obj-$(CONFIG_DRIVER_NET_MPC5200) += firmware_sc_task_bestcomm.impl.o +obj-y += cpu.o +obj-y += cpu_init.o +obj-y += ide.o +obj-y += loadtask.o +obj-y += pci_mpc5200.o +obj-y += speed.o +obj-y += traps.o +extra-y += start.o +obj-$(CONFIG_MPC5200) += firmware_sc_task_bestcomm.impl.o +obj-$(CONFIG_INTERRUPTS) += interrupts.o +obj-$(CONFIG_REGINFO) += reginfo.o + #obj-y += firmware_sc_task.impl.o -obj-y += ide.o -obj-$(CONFIG_INTERRUPTS) += interrupts.o #obj-y += io.o -obj-y += loadtask.o -obj-y += pci_mpc5200.o -obj-y += speed.o -extra-y += start.o -obj-y += traps.o diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c index 86a7e1965e..1bb340dedb 100644 --- a/cpu/mpc5xxx/cpu.c +++ b/cpu/mpc5xxx/cpu.c @@ -27,7 +27,7 @@ #include <common.h> #include <command.h> -#include <mpc5xxx.h> +#include <asm/arch/mpc5xxx.h> #include <asm/processor.h> #include <asm/byteorder.h> #include <init.h> diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index 2001566d2a..b8c069f3a0 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -22,7 +22,7 @@ */ #include <common.h> -#include <mpc5xxx.h> +#include <asm/arch/mpc5xxx.h> #include <types.h> /* diff --git a/cpu/mpc5xxx/loadtask.c b/cpu/mpc5xxx/loadtask.c index 559d8b5c5e..77ba8c89d2 100644 --- a/cpu/mpc5xxx/loadtask.c +++ b/cpu/mpc5xxx/loadtask.c @@ -7,7 +7,7 @@ */ #include <common.h> -#include <mpc5xxx.h> +#include <asm/arch/mpc5xxx.h> #include <types.h> /* BestComm/SmartComm microcode */ diff --git a/cpu/mpc5xxx/reginfo.c b/cpu/mpc5xxx/reginfo.c new file mode 100644 index 0000000000..130e0357d6 --- /dev/null +++ b/cpu/mpc5xxx/reginfo.c @@ -0,0 +1,59 @@ +#include <stdio.h> +#include <config.h> +#include <asm/arch/mpc5xxx.h> + +void reginfo(void) +{ + puts ("\nMPC5200 registers\n"); + printf ("MBAR=%08x\n", CFG_MBAR); + puts ("Memory map registers\n"); + printf ("\tCS0: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS0_START, + *(volatile ulong*)MPC5XXX_CS0_STOP, + *(volatile ulong*)MPC5XXX_CS0_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x00010000) ? 1 : 0); + printf ("\tCS1: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS1_START, + *(volatile ulong*)MPC5XXX_CS1_STOP, + *(volatile ulong*)MPC5XXX_CS1_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x00020000) ? 1 : 0); + printf ("\tCS2: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS2_START, + *(volatile ulong*)MPC5XXX_CS2_STOP, + *(volatile ulong*)MPC5XXX_CS2_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x00040000) ? 1 : 0); + printf ("\tCS3: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS3_START, + *(volatile ulong*)MPC5XXX_CS3_STOP, + *(volatile ulong*)MPC5XXX_CS3_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x00080000) ? 1 : 0); + printf ("\tCS4: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS4_START, + *(volatile ulong*)MPC5XXX_CS4_STOP, + *(volatile ulong*)MPC5XXX_CS4_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x00100000) ? 1 : 0); + printf ("\tCS5: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS5_START, + *(volatile ulong*)MPC5XXX_CS5_STOP, + *(volatile ulong*)MPC5XXX_CS5_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x00200000) ? 1 : 0); + printf ("\tCS6: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS6_START, + *(volatile ulong*)MPC5XXX_CS6_STOP, + *(volatile ulong*)MPC5XXX_CS6_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x04000000) ? 1 : 0); + printf ("\tCS7: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_CS7_START, + *(volatile ulong*)MPC5XXX_CS7_STOP, + *(volatile ulong*)MPC5XXX_CS7_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x08000000) ? 1 : 0); + printf ("\tBOOTCS: start %08X\tstop %08X\tconfig %08X\ten %d\n", + *(volatile ulong*)MPC5XXX_BOOTCS_START, + *(volatile ulong*)MPC5XXX_BOOTCS_STOP, + *(volatile ulong*)MPC5XXX_BOOTCS_CFG, + (*(volatile ulong*)MPC5XXX_ADDECR & 0x02000000) ? 1 : 0); + printf ("\tSDRAMCS0: %08X\n", + *(volatile ulong*)MPC5XXX_SDRAM_CS0CFG); + printf ("\tSDRAMCS1: %08X\n", + *(volatile ulong*)MPC5XXX_SDRAM_CS1CFG); +} diff --git a/cpu/mpc5xxx/speed.c b/cpu/mpc5xxx/speed.c index 3283fa81e0..7207016831 100644 --- a/cpu/mpc5xxx/speed.c +++ b/cpu/mpc5xxx/speed.c @@ -22,7 +22,7 @@ */ #include <common.h> -#include <mpc5xxx.h> +#include <asm/arch/mpc5xxx.h> #include <init.h> #include <asm/processor.h> #include <types.h> diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S index 795fdd4ff6..887ca956a4 100644 --- a/cpu/mpc5xxx/start.S +++ b/cpu/mpc5xxx/start.S @@ -26,7 +26,7 @@ * U-Boot - Startup Code for MPC5xxx CPUs */ #include <config.h> -#include <mpc5xxx.h> +#include <asm/arch/mpc5xxx.h> #include <version.h> #include <ppc_asm.tmpl> diff --git a/cpu/ppc4xx/reginfo_405ep.c b/cpu/ppc4xx/reginfo_405ep.c new file mode 100644 index 0000000000..19fb649123 --- /dev/null +++ b/cpu/ppc4xx/reginfo_405ep.c @@ -0,0 +1,68 @@ +#include <common.h> + +void reginfo(void) + printf ("\n405EP registers; MSR=%08x\n",mfmsr()); + printf ("\nUniversal Interrupt Controller Regs\n" + "uicsr uicer uiccr uicpr uictr uicmsr uicvr uicvcr" + "\n" + "%08x %08x %08x %08x %08x %08x %08x %08x\n", + mfdcr(uicsr), + mfdcr(uicer), + mfdcr(uiccr), + mfdcr(uicpr), + mfdcr(uictr), + mfdcr(uicmsr), + mfdcr(uicvr), + mfdcr(uicvcr)); + + puts ("\nMemory (SDRAM) Configuration\n" + "mcopt1 rtr pmit mb0cf mb1cf sdtr1\n"); + + mtdcr(memcfga,mem_mcopt1); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_rtr); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_pmit); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_mb0cf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_mb1cf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_sdtr1); printf ("%08x ", mfdcr(memcfgd)); + + printf ("\n\n" + "DMA Channels\n" + "dmasr dmasgc dmaadr\n" "%08x %08x %08x\n" + "dmacr_0 dmact_0 dmada_0 dmasa_0 dmasb_0\n" "%08x %08x %08x %08x %08x\n" + "dmacr_1 dmact_1 dmada_1 dmasa_1 dmasb_1\n" "%08x %08x %08x %08x %08x\n", + mfdcr(dmasr), mfdcr(dmasgc),mfdcr(dmaadr), + mfdcr(dmacr0), mfdcr(dmact0),mfdcr(dmada0), mfdcr(dmasa0), mfdcr(dmasb0), + mfdcr(dmacr1), mfdcr(dmact1),mfdcr(dmada1), mfdcr(dmasa1), mfdcr(dmasb1)); + + printf ( + "dmacr_2 dmact_2 dmada_2 dmasa_2 dmasb_2\n" "%08x %08x %08x %08x %08x\n" + "dmacr_3 dmact_3 dmada_3 dmasa_3 dmasb_3\n" "%08x %08x %08x %08x %08x\n", + mfdcr(dmacr2), mfdcr(dmact2),mfdcr(dmada2), mfdcr(dmasa2), mfdcr(dmasb2), + mfdcr(dmacr3), mfdcr(dmact3),mfdcr(dmada3), mfdcr(dmasa3), mfdcr(dmasb3) ); + + puts ("\n" + "External Bus\n" + "pbear pbesr0 pbesr1 epcr\n"); + mtdcr(ebccfga,pbear); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pbesr0); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pbesr1); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,epcr); printf ("%08x ", mfdcr(ebccfgd)); + + puts ("\n" + "pb0cr pb0ap pb1cr pb1ap pb2cr pb2ap pb3cr pb3ap\n"); + mtdcr(ebccfga,pb0cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb0ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb1cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb1ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb2cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb2ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb3cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb3ap); printf ("%08x ", mfdcr(ebccfgd)); + + puts ("\n" + "pb4cr pb4ap\n"); + mtdcr(ebccfga,pb4cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb4ap); printf ("%08x ", mfdcr(ebccfgd)); + + puts ("\n\n"); +} diff --git a/cpu/ppc4xx/reginfo_405gp.c b/cpu/ppc4xx/reginfo_405gp.c new file mode 100644 index 0000000000..c220ad8a6b --- /dev/null +++ b/cpu/ppc4xx/reginfo_405gp.c @@ -0,0 +1,91 @@ +#include <common.h> + +void reginfo(void) +{ + printf ("\n405GP registers; MSR=%08x\n",mfmsr()); + printf ("\nUniversal Interrupt Controller Regs\n" + "uicsr uicsrs uicer uiccr uicpr uictr uicmsr uicvr uicvcr" + "\n" + "%08x %08x %08x %08x %08x %08x %08x %08x %08x\n", + mfdcr(uicsr), + mfdcr(uicsrs), + mfdcr(uicer), + mfdcr(uiccr), + mfdcr(uicpr), + mfdcr(uictr), + mfdcr(uicmsr), + mfdcr(uicvr), + mfdcr(uicvcr)); + + puts ("\nMemory (SDRAM) Configuration\n" + "besra besrsa besrb besrsb bear mcopt1 rtr pmit\n"); + + mtdcr(memcfga,mem_besra); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_besrsa); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_besrb); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_besrsb); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_bear); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_mcopt1); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_rtr); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_pmit); printf ("%08x ", mfdcr(memcfgd)); + + puts ("\n" + "mb0cf mb1cf mb2cf mb3cf sdtr1 ecccf eccerr\n"); + mtdcr(memcfga,mem_mb0cf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_mb1cf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_mb2cf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_mb3cf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_sdtr1); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_ecccf); printf ("%08x ", mfdcr(memcfgd)); + mtdcr(memcfga,mem_eccerr); printf ("%08x ", mfdcr(memcfgd)); + + printf ("\n\n" + "DMA Channels\n" + "dmasr dmasgc dmaadr\n" + "%08x %08x %08x\n" + "dmacr_0 dmact_0 dmada_0 dmasa_0 dmasb_0\n" + "%08x %08x %08x %08x %08x\n" + "dmacr_1 dmact_1 dmada_1 dmasa_1 dmasb_1\n" + "%08x %08x %08x %08x %08x\n", + mfdcr(dmasr), mfdcr(dmasgc),mfdcr(dmaadr), + mfdcr(dmacr0), mfdcr(dmact0),mfdcr(dmada0), mfdcr(dmasa0), mfdcr(dmasb0), + mfdcr(dmacr1), mfdcr(dmact1),mfdcr(dmada1), mfdcr(dmasa1), mfdcr(dmasb1)); + + printf ( + "dmacr_2 dmact_2 dmada_2 dmasa_2 dmasb_2\n" "%08x %08x %08x %08x %08x\n" + "dmacr_3 dmact_3 dmada_3 dmasa_3 dmasb_3\n" "%08x %08x %08x %08x %08x\n", + mfdcr(dmacr2), mfdcr(dmact2),mfdcr(dmada2), mfdcr(dmasa2), mfdcr(dmasb2), + mfdcr(dmacr3), mfdcr(dmact3),mfdcr(dmada3), mfdcr(dmasa3), mfdcr(dmasb3) ); + + puts ("\n" + "External Bus\n" + "pbear pbesr0 pbesr1 epcr\n"); + mtdcr(ebccfga,pbear); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pbesr0); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pbesr1); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,epcr); printf ("%08x ", mfdcr(ebccfgd)); + + puts ("\n" + "pb0cr pb0ap pb1cr pb1ap pb2cr pb2ap pb3cr pb3ap\n"); + mtdcr(ebccfga,pb0cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb0ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb1cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb1ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb2cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb2ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb3cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb3ap); printf ("%08x ", mfdcr(ebccfgd)); + + puts ("\n" + "pb4cr pb4ap pb5cr bp5ap pb6cr pb6ap pb7cr pb7ap\n"); + mtdcr(ebccfga,pb4cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb4ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb5cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb5ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb6cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb6ap); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb7cr); printf ("%08x ", mfdcr(ebccfgd)); + mtdcr(ebccfga,pb7ap); printf ("%08x ", mfdcr(ebccfgd)); + + puts ("\n\n"); +}
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