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author | Sascha Hauer <s.hauer@pengutronix.de> | 2007-07-05 18:01:58 +0200 |
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committer | Sascha Hauer <sha@octopus.labnet.pengutronix.de> | 2007-07-05 18:01:58 +0200 |
commit | cef1d625e708d3f4591a8a90b347b44c121ac12a (patch) | |
tree | bb2ca881eeca8ce07dcf847a2536aae8e9bae416 /cpu | |
parent | 9ab09222fffbc7fcbad37ccf8798f65901388c29 (diff) | |
download | barebox-cef1d625e708d3f4591a8a90b347b44c121ac12a.tar.gz barebox-cef1d625e708d3f4591a8a90b347b44c121ac12a.tar.xz |
svn_rev_488
remove redundant code
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/ixp/cpu.c | 106 | ||||
-rw-r--r-- | cpu/pxa/cpu.c | 111 |
2 files changed, 0 insertions, 217 deletions
diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c index 7f9f3344b3..ec486cd3b5 100644 --- a/cpu/ixp/cpu.c +++ b/cpu/ixp/cpu.c @@ -85,115 +85,9 @@ int cpu_init (void) FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; #endif -#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined (CONFIG_PCI) - pci_init(); -#endif return 0; } -int cleanup_before_linux (void) -{ - /* - * this function is called just before we call linux - * it prepares the processor for linux - * - * just disable everything that can disturb booting linux - */ - - unsigned long i; - - disable_interrupts (); - - /* turn off I-cache */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - i &= ~0x1000; - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); - - /* flush I-cache */ - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); - - return (0); -} - -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - printf ("resetting ...\n"); - - udelay (50000); /* wait 50 ms */ - disable_interrupts (); - reset_cpu (0); - - /*NOTREACHED*/ - return (0); -} - -/* taken from blob */ -void icache_enable (void) -{ - register u32 i; - - /* read control register */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - - /* set i-cache */ - i |= 0x1000; - - /* write back to control register */ - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); -} - -void icache_disable (void) -{ - register u32 i; - - /* read control register */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - - /* clear i-cache */ - i &= ~0x1000; - - /* write back to control register */ - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); - - /* flush i-cache */ - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); -} - -int icache_status (void) -{ - register u32 i; - - /* read control register */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - - /* return bit */ - return (i & 0x1000); -} - -/* we will never enable dcache, because we have to setup MMU first */ -void dcache_enable (void) -{ - return; -} - -void dcache_disable (void) -{ - return; -} - -int dcache_status (void) -{ - return 0; /* always off */ -} - -/* FIXME */ -/* -void pci_init(void) -{ - return; -} -*/ - #ifdef CONFIG_BOOTCOUNT_LIMIT void bootcount_store (ulong a) diff --git a/cpu/pxa/cpu.c b/cpu/pxa/cpu.c index 0ee8180361..6116b49c13 100644 --- a/cpu/pxa/cpu.c +++ b/cpu/pxa/cpu.c @@ -34,117 +34,6 @@ #include <command.h> #include <asm/arch/pxa-regs.h> -#ifdef CONFIG_USE_IRQ -DECLARE_GLOBAL_DATA_PTR; -#endif - -int cpu_init (void) -{ - /* - * setup up stacks if necessary - */ -#ifdef CONFIG_USE_IRQ - IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4; - FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; -#endif - return 0; -} - -int cleanup_before_linux (void) -{ - /* - * this function is called just before we call linux - * it prepares the processor for linux - * - * just disable everything that can disturb booting linux - */ - - unsigned long i; - - disable_interrupts (); - - /* turn off I-cache */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - i &= ~0x1000; - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); - - /* flush I-cache */ - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); - - return (0); -} - -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - printf ("resetting ...\n"); - - udelay (50000); /* wait 50 ms */ - disable_interrupts (); - reset_cpu (0); - - /*NOTREACHED*/ - return (0); -} - -/* taken from blob */ -void icache_enable (void) -{ - register u32 i; - - /* read control register */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - - /* set i-cache */ - i |= 0x1000; - - /* write back to control register */ - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); -} - -void icache_disable (void) -{ - register u32 i; - - /* read control register */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - - /* clear i-cache */ - i &= ~0x1000; - - /* write back to control register */ - asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i)); - - /* flush i-cache */ - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); -} - -int icache_status (void) -{ - register u32 i; - - /* read control register */ - asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); - - /* return bit */ - return (i & 0x1000); -} - -/* we will never enable dcache, because we have to setup MMU first */ -void dcache_enable (void) -{ - return; -} - -void dcache_disable (void) -{ - return; -} - -int dcache_status (void) -{ - return 0; /* always off */ -} - #ifndef CONFIG_CPU_MONAHANS void set_GPIO_mode(int gpio_mode) { |