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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2022-02-02 20:55:24 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-02-03 11:14:36 +0100 |
| commit | 2f1df20b3798151889b4cce1513d8f691a0e72ca (patch) | |
| tree | 18fe8f04099d2525e554480c21f9272bc6a8e6a3 /drivers/clk | |
| parent | dd333a1380f38eac53ac3eb002d4b831ba8e16ae (diff) | |
| download | barebox-2f1df20b3798151889b4cce1513d8f691a0e72ca.tar.gz barebox-2f1df20b3798151889b4cce1513d8f691a0e72ca.tar.xz | |
clk: imx6: fix PLL exception for i.MX6DQ revision 1.0
cpu_is_mx6* and imx_silicon_revision access static variables only
initialized in imx_init(). Use the alternative functions instead, that
will always consult the hardware to determine the version.
This requires us to know beforehand that we run on an i.MX6, but this
is a given when probing the imx6-ccm driver.
Other instances of this issue were removed in 37bc313add40 ("clk: imx6:
fix use of cpu_is_mx6* before they are initialized"), but this instance
was reintroduced as part of b534f79112f0 ("clk: imx6: Fix procedure to
switch the parent of LDB_DI_CLK").
This change only affects i.MX6D/Q SoCs with exactly revision 1.0 and
aligns their behavior to that of the Linux clock driver.
Fixes: b534f79112f0 ("clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220202195524.30740-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-imx6.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c index 6935a8e852..e3afcf7858 100644 --- a/drivers/clk/imx/clk-imx6.c +++ b/drivers/clk/imx/clk-imx6.c @@ -60,8 +60,8 @@ static inline int cpu_mx6_is_plus(void) /* Audio/Video PLL post dividers don't work on i.MX6q revision 1.0 */ static inline int cpu_has_working_video_pll_post_div(void) { - return !((cpu_is_mx6q() || cpu_is_mx6d()) && - imx_silicon_revision() == IMX_CHIP_REV_1_0); + return !((cpu_mx6_is_mx6q() || cpu_mx6_is_mx6d()) && + __imx6_cpu_revision() == IMX_CHIP_REV_1_0); } /* i.MX6 Quad/Dual/DualLite/Solo are all affected */ |