diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-11-10 14:00:27 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-11-13 13:48:03 +0100 |
| commit | 25719e31608d6aba03a0b1536040e7369f405e17 (patch) | |
| tree | 7967f2219fc6b8e1c256504274e74b6f964f4527 /drivers/ddr | |
| parent | e1f32e3f59759b7c55387eb2361b7855d23ef578 (diff) | |
| download | barebox-25719e31608d6aba03a0b1536040e7369f405e17.tar.gz barebox-25719e31608d6aba03a0b1536040e7369f405e17.tar.xz | |
ddr: move imx8m_ddr_old_spreadsheet to controller
Link: https://lore.barebox.org/20231110130028.2123895-13-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/imx/helper.c | 4 | ||||
| -rw-r--r-- | drivers/ddr/imx/imx8m_ddr_init.c | 14 |
2 files changed, 9 insertions, 9 deletions
diff --git a/drivers/ddr/imx/helper.c b/drivers/ddr/imx/helper.c index f38b9a0060..674ca7e4ac 100644 --- a/drivers/ddr/imx/helper.c +++ b/drivers/ddr/imx/helper.c @@ -27,7 +27,7 @@ void ddrphy_trained_csr_save(struct dram_controller *dram, struct dram_cfg_param dwc_ddrphy_apb_wr(dram, 0xd0000, 0x1); } -void *dram_config_save(struct dram_timing_info *timing_info, +void *dram_config_save(struct dram_controller *dram, struct dram_timing_info *timing_info, unsigned long saved_timing_base) { int i = 0; @@ -54,7 +54,7 @@ void *dram_config_save(struct dram_timing_info *timing_info, cfg++; } - if (imx8m_ddr_old_spreadsheet) { + if (dram->imx8m_ddr_old_spreadsheet) { cfg->reg = DDRC_ADDRMAP7(0); cfg->val = 0xf0f; cfg++; diff --git a/drivers/ddr/imx/imx8m_ddr_init.c b/drivers/ddr/imx/imx8m_ddr_init.c index 8d473a3e63..8b829645c0 100644 --- a/drivers/ddr/imx/imx8m_ddr_init.c +++ b/drivers/ddr/imx/imx8m_ddr_init.c @@ -13,19 +13,19 @@ #include <mach/imx/imx8m-regs.h> #include <mach/imx/imx8m-ccm-regs.h> -bool imx8m_ddr_old_spreadsheet = true; - struct dram_controller imx8m_dram_controller = { .phy_base = IOMEM(IP2APB_DDRPHY_IPS_BASE_ADDR(0)), }; -static void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) +static void ddr_cfg_umctl2(struct dram_controller *dram, struct dram_cfg_param *ddrc_cfg, int num) { int i = 0; + dram->imx8m_ddr_old_spreadsheet = true; + for (i = 0; i < num; i++) { if (ddrc_cfg->reg == DDRC_ADDRMAP7(0)) - imx8m_ddr_old_spreadsheet = false; + dram->imx8m_ddr_old_spreadsheet = false; reg32_write((unsigned long)ddrc_cfg->reg, ddrc_cfg->val); ddrc_cfg++; } @@ -35,7 +35,7 @@ static void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) * which falsifies the memory size read back from the controller * in barebox proper. */ - if (imx8m_ddr_old_spreadsheet) { + if (dram->imx8m_ddr_old_spreadsheet) { pr_warn("Working around old spreadsheet. Please regenerate\n"); /* * Alternatively, stick { DDRC_ADDRMAP7(0), 0xf0f } into @@ -518,7 +518,7 @@ int imx8m_ddr_init(struct dram_controller *dram, struct dram_timing_info *dram_t /* Step2: Program the dwc_ddr_umctl2 registers */ pr_debug("ddrc config start\n"); - ddr_cfg_umctl2(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); + ddr_cfg_umctl2(dram, dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); pr_debug("ddrc config done\n"); /* Step3: De-assert reset signal(core_ddrc_rstn & aresetn_n) */ @@ -640,7 +640,7 @@ int imx8m_ddr_init(struct dram_controller *dram, struct dram_timing_info *dram_t pr_debug("ddrmix config done\n"); /* save the dram timing config into memory */ - dram_config_save(dram_timing, IMX8M_SAVED_DRAM_TIMING_BASE); + dram_config_save(dram, dram_timing, IMX8M_SAVED_DRAM_TIMING_BASE); return 0; } |