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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2023-11-23 11:38:08 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-11-23 15:54:32 +0100 |
| commit | eb0a95422ff12f8fe356dcecad2c2595be3ce07e (patch) | |
| tree | a18bbf86ff2809d8a133187b8053ac920ac6838f /drivers/mci/mci-core.c | |
| parent | 030b38c5b8c55c47a1c5b61cca45f76106938336 (diff) | |
| download | barebox-eb0a95422ff12f8fe356dcecad2c2595be3ce07e.tar.gz barebox-eb0a95422ff12f8fe356dcecad2c2595be3ce07e.tar.xz | |
mci: stm32_sdmmc2: enable eMMC 52MHz DDR mode
Dual data rate can be enabled on STM32 SDMMC2 host by toggling a bit in
the CLKRC register and avoiding clock bypass. Let's do that for a nice
boost in throughput. Before:
barebox@STM32MP157C-ED1:/ time cp /dev/mmc0.data /tmp
time: 2684ms
After:
barebox@STM32MP157C-ED1:/ time cp /dev/mmc1.data /tmp
time: 1624ms
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20231123103808.432548-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/mci/mci-core.c')
0 files changed, 0 insertions, 0 deletions