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| author | Lucas Stach <l.stach@pengutronix.de> | 2020-05-11 18:50:38 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-05-12 09:51:45 +0200 |
| commit | 7c5c6561f0caf3cc4cb29640daa8224a3cb3f650 (patch) | |
| tree | cef915c3e54a904a388c8249aa61307a9ff29c8c /drivers/net | |
| parent | aa9835fa53b401706e31c63e24b778a68e0f58ca (diff) | |
| download | barebox-7c5c6561f0caf3cc4cb29640daa8224a3cb3f650.tar.gz barebox-7c5c6561f0caf3cc4cb29640daa8224a3cb3f650.tar.xz | |
net: designware: eqos: attach PHY earlier
If the PHY isn't driving the refclock, the software reset of the
controller will time out. Some PHYs need some board specific
configuration to properly drive the reflock. Attach the PHY before
attempting the software reset, so PHY fixups have a chance to run.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/designware_eqos.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/net/designware_eqos.c b/drivers/net/designware_eqos.c index cb52f3942d..d2baaeaf63 100644 --- a/drivers/net/designware_eqos.c +++ b/drivers/net/designware_eqos.c @@ -360,6 +360,11 @@ static int eqos_start(struct eth_device *edev) int ret; int i; + ret = phy_device_connect(edev, &eqos->miibus, eqos->phy_addr, + eqos->ops->adjust_link, 0, eqos->interface); + if (ret) + return ret; + setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR); ret = readl_poll_timeout(&eqos->dma_regs->mode, mode_set, @@ -379,11 +384,6 @@ static int eqos_start(struct eth_device *edev) val = (rate / USEC_PER_SEC) - 1; /* -1 because the data sheet says so */ writel(val, &eqos->mac_regs->us_tic_counter); - ret = phy_device_connect(edev, &eqos->miibus, eqos->phy_addr, - eqos->ops->adjust_link, 0, eqos->interface); - if (ret) - return ret; - /* Before we reset the mac, we must insure the PHY is not powered down * as the dw controller needs all clock domains to be running, including * the PHY clock, to come out of a mac reset. */ |