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| author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2019-10-28 00:18:30 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-11-06 11:22:35 +0100 |
| commit | 3bf910ddb0488689860e8ee6893142a93fdb3cf1 (patch) | |
| tree | eb2940a0cb214944cabeb7cc72bb2ceffd9de4e6 /drivers/nvmem/Kconfig | |
| parent | 6fb978dd7162b4aa708eb415f2bb1278403e041c (diff) | |
| download | barebox-3bf910ddb0488689860e8ee6893142a93fdb3cf1.tar.gz barebox-3bf910ddb0488689860e8ee6893142a93fdb3cf1.tar.xz | |
nvmem: add read support for STM32MP1 bsec OTP
The bsec on the STM32MP157C provides a 380 byte OTP. Add initial support
for reading and writing the shadow copy of the fuses. Direct fuse
access is not yet supported.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/nvmem/Kconfig')
| -rw-r--r-- | drivers/nvmem/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index c28a6d4e43..968342b281 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -51,4 +51,12 @@ config EEPROM_93XX46 supports both read and write commands and also the command to erase the whole EEPROM. +config STM32_BSEC + tristate "STM32 Boot and security and OTP control" + depends on ARCH_STM32MP + depends on OFDEVICE + help + This adds support for the STM32 OTP controller. Reads and writes + to will go to the shadow RAM, not the OTP fuses themselvers. + endif |