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authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-12-16 21:18:33 -0800
committerSascha Hauer <s.hauer@pengutronix.de>2019-01-08 16:28:47 +0100
commit0aa89c9deaebf3d1258814f38930abd8ec0987ab (patch)
tree100734478d7b496e764eebc197c70d2a9fbd50d7 /drivers/pci/pci-imx6.c
parent5a7a0ec30661559c65c8085c8949cab1ec3bccd6 (diff)
downloadbarebox-0aa89c9deaebf3d1258814f38930abd8ec0987ab.tar.gz
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PCI: imx6: Move link up check into imx6_pcie_wait_for_link()
Port of a Linux commit 4d107d3b5a686b5834e533a00b73bf7b1cf59df7 imx6_pcie_link_up() previously used usleep_range() to wait for the link to come up. Since it may be called while holding the config spinlock, the sleep causes a "BUG: scheduling while atomic" error. Instead of waiting for the link to come up in imx6_pcie_link_up(), do the waiting in imx6_pcie_wait_for_link(), where we're not holding a lock and sleeping is allowed. [bhelgaas: changelog, references to bugzilla and f95d3ae77191] Link: https://bugzilla.kernel.org/show_bug.cgi?id=100031 Fixes: f95d3ae77191 ("PCI: imx6: Wait for retraining") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/pci/pci-imx6.c')
-rw-r--r--drivers/pci/pci-imx6.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c
index fc56a0d14a..53d767824a 100644
--- a/drivers/pci/pci-imx6.c
+++ b/drivers/pci/pci-imx6.c
@@ -399,8 +399,26 @@ static int imx6_pcie_wait_for_link(struct pcie_port *pp)
{
uint64_t start = get_time_ns();
+ /*
+ * Test if the PHY reports that the link is up and also that the LTSSM
+ * training finished. There are three possible states of the link when
+ * this code is called:
+ * 1) The link is DOWN (unlikely)
+ * The link didn't come up yet for some reason. This usually means
+ * we have a real problem somewhere, if it happens with a peripheral
+ * connected. This state calls for inspection of the DEBUG registers.
+ * 2) The link is UP, but still in LTSSM training
+ * Wait for the training to finish, which should take a very short
+ * time. If the training does not finish, we have a problem and we
+ * need to inspect the DEBUG registers. If the training does finish,
+ * the link is up and operating correctly.
+ * 3) The link is UP and no longer in LTSSM training
+ * The link is up and operating correctly.
+ */
while (1) {
- if (dw_pcie_link_up(pp))
+ u32 reg = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);
+ if ((reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_UP) &&
+ !(reg & PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING))
return 0;
if (!is_timeout(start, SECOND))