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authorAhmad Fatoum <a.fatoum@pengutronix.de>2020-02-20 11:01:11 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-02-25 09:10:40 +0100
commita2d10b46f39e36c0e19bfde0737e27d2b0bf43ba (patch)
tree8b935e2f8ec7b1ca47e6d17c5758ef25c1e206c8 /drivers/phy/Kconfig
parent3477974f9eb21d8a3ecfb330af3b5ef0c08acee2 (diff)
downloadbarebox-a2d10b46f39e36c0e19bfde0737e27d2b0bf43ba.tar.gz
barebox-a2d10b46f39e36c0e19bfde0737e27d2b0bf43ba.tar.xz
phy: port over Linux stm32 usbphyc driver
This ports over the Linux v5.6-rc1 state of the driver. It'll be needed for both EHCI and DWC2 usb connectivity on the stm32mp1. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/phy/Kconfig')
-rw-r--r--drivers/phy/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index b5cefb2ff3..b5c8e98b9e 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -24,4 +24,17 @@ config USB_NOP_XCEIV
source "drivers/phy/freescale/Kconfig"
+config PHY_STM32_USBPHYC
+ tristate "STM32 USB HS PHY Controller"
+ depends on ARCH_STM32MP
+ help
+ Enable this to support the High-Speed USB transceivers that are part
+ of some STMicroelectronics STM32 SoCs.
+
+ This driver controls the entire USB PHY block: the USB PHY controller
+ (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
+ used by an HS USB Host controller, and the second one is shared
+ between an HS USB OTG controller and an HS USB Host controller,
+ selected by a USB switch.
+
endif