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authorEnrico Scholz <enrico.scholz@sigma-chemnitz.de>2013-05-14 15:14:54 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-05-17 10:23:42 +0200
commit19bc427e44ba098b420a29de92cc010927793554 (patch)
tree347f2086926ca9c27c1079b8d91f0fe5beaf2e19 /drivers/pinctrl/imx-iomux-v3.c
parentae6f75111791dcf0ee5ccc4e37ce8612665ed9e3 (diff)
downloadbarebox-19bc427e44ba098b420a29de92cc010927793554.tar.gz
ARM v7: fix mmu-off operation
Although conclusions in 50d1b2de8ea0f3b8d89fe3a97ce64315996ed4cb "ARM v7: Fix register corruption in v7_mmu_cache_off" are correct, the implemented fix is not complete because the following failure can happen: 1. d-cache contains the cache line around 'sp' 2. v7_mmu_cache_off() disables cache 3. early v7_mmu_cache_flush() pushes 'lr' on uncached stack 4. v7_mmu_cache_flush() flushes d-cache and can override stack written by step 3. 5. v7_mmu_cache_flush() pops 'lr' out of cache and jumps to it which might be random data now. Patch avoids step 3 which is easy because 'lr' is never modified by the function. By using the 'r12' scratch register instead of 'r10', the whole initial 'push' can be avoided. Patch moves also the 'DMB' operation so that it is executed after data has been pushed on stack. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/pinctrl/imx-iomux-v3.c')
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