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author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-04-23 09:43:15 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-04-23 09:47:24 +0200 |
commit | e2f9687c02eac444fd5962b4ef55b9daf24f95ae (patch) | |
tree | 08e42da7655e965ffbda24a9d487278426d136a6 /drivers/pinctrl | |
parent | e20ee612d8ee99ba4e56b7ca3e757835ef50515c (diff) | |
download | barebox-e2f9687c02eac444fd5962b4ef55b9daf24f95ae.tar.gz barebox-e2f9687c02eac444fd5962b4ef55b9daf24f95ae.tar.xz |
pinctrl: move imx-iomux-v2 to drivers/pinctrl/
For consistency reasons.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/Kconfig | 5 | ||||
-rw-r--r-- | drivers/pinctrl/Makefile | 1 | ||||
-rw-r--r-- | drivers/pinctrl/imx-iomux-v2.c | 152 |
3 files changed, 158 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 6ce01bffe8..6b73d7b256 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -9,6 +9,11 @@ config PINCTRL from the devicetree. Legacy drivers here may not need this core support but instead provide their own SoC specific APIs +config PINCTRL_IMX_IOMUX_V2 + bool "i.MX iomux v2" + help + This iomux controller is found on i.MX31. + config PINCTRL_IMX_IOMUX_V3 select PINCTRL if OFDEVICE bool "i.MX iomux v3" diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 134c889c99..b03a20f663 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_PINCTRL) += pinctrl.o +obj-$(CONFIG_PINCTRL_IMX_IOMUX_V2) += imx-iomux-v2.o obj-$(CONFIG_PINCTRL_IMX_IOMUX_V3) += imx-iomux-v3.o diff --git a/drivers/pinctrl/imx-iomux-v2.c b/drivers/pinctrl/imx-iomux-v2.c new file mode 100644 index 0000000000..cef0340909 --- /dev/null +++ b/drivers/pinctrl/imx-iomux-v2.c @@ -0,0 +1,152 @@ +/* + * (C) 2007, Sascha Hauer <sha@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + */ + +#include <common.h> +#include <io.h> +#include <init.h> +#include <mach/iomux-mx31.h> + +/* + * IOMUX register (base) addresses + */ +#define IOMUXINT_OBS1 0x000 +#define IOMUXINT_OBS2 0x004 +#define IOMUXGPR 0x008 +#define IOMUXSW_MUX_CTL 0x00C +#define IOMUXSW_PAD_CTL 0x154 + +#define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3) + +static void __iomem *base; + +/* + * set the mode for a IOMUX pin. + */ +int imx_iomux_mode(unsigned int pin_mode) +{ + u32 field, l, mode, ret = 0; + void __iomem *reg; + + if (!base) + return -EINVAL; + + reg = base + IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK); + field = pin_mode & 0x3; + mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT; + + pr_debug("%s: reg offset = 0x%x field = %d mode = 0x%02x\n", + __func__, (pin_mode & IOMUX_REG_MASK), field, mode); + + l = readl(reg); + l &= ~(0xff << (field * 8)); + l |= mode << (field * 8); + writel(l, reg); + + return ret; +} +EXPORT_SYMBOL(mxc_iomux_mode); + +/* + * This function configures the pad value for a IOMUX pin. + */ +void imx_iomux_set_pad(enum iomux_pins pin, u32 config) +{ + u32 field, l; + void __iomem *reg; + + if (!base) + return; + + pin &= IOMUX_PADNUM_MASK; + reg = base + IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4; + field = (pin + 2) % 3; + + pr_debug("%s: reg offset = 0x%x, field = %d\n", + __func__, (pin + 2) / 3, field); + + l = readl(reg); + l &= ~(0x1ff << (field * 10)); + l |= config << (field * 10); + writel(l, reg); +} +EXPORT_SYMBOL(mxc_iomux_set_pad); + +/* + * This function enables/disables the general purpose function for a particular + * signal. + */ +void imx_iomux_set_gpr(enum iomux_gp_func gp, bool en) +{ + u32 l; + + if (!base) + return; + + l = readl(base + IOMUXGPR); + if (en) + l |= gp; + else + l &= ~gp; + + writel(l, base + IOMUXGPR); +} +EXPORT_SYMBOL(mxc_iomux_set_gpr); + +int imx_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count) +{ + int i; + + for (i = 0; i < count; i++) + imx_iomux_mode(pin_list[i]); + + return 0; +} + +static int imx_iomux_probe(struct device_d *dev) +{ + base = dev_request_mem_region(dev, 0); + + return 0; +} + +static __maybe_unused struct of_device_id imx_iomux_dt_ids[] = { + { + .compatible = "fsl,imx31-iomux", + }, { + /* sentinel */ + } +}; + +static struct platform_device_id imx_iomux_ids[] = { + { + .name = "imx31-iomux", + }, { + /* sentinel */ + }, +}; + +static struct driver_d imx_iomux_driver = { + .name = "imx-iomuxv2", + .probe = imx_iomux_probe, + .of_compatible = DRV_OF_COMPAT(imx_iomux_dt_ids), + .id_table = imx_iomux_ids, +}; + +static int imx_iomux_init(void) +{ + return platform_driver_register(&imx_iomux_driver); +} +postcore_initcall(imx_iomux_init); |