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| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-11-20 20:36:01 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-11-23 08:00:09 +0100 |
| commit | 144adf217030cbb5f7d9fd2acde6e257f5ba12d2 (patch) | |
| tree | f07af3351a8c08a4adf539afd3ff3f5f9ec2737f /drivers | |
| parent | bb7a7557f75ca0d676027ec2fc740f6145d93761 (diff) | |
| download | barebox-144adf217030cbb5f7d9fd2acde6e257f5ba12d2.tar.gz barebox-144adf217030cbb5f7d9fd2acde6e257f5ba12d2.tar.xz | |
mtd: nand_mrvl_nfc: Use Auto Read Status on program/erase
Marvell NAND controller allows to enable an Auto Read Status feature
that will automatically monitor NAND status during Erase and Program
operations. Ready bit in status register will be set after the
controller is sure the NAND device has finished the operation and
saves us from guessing the real timeout values.
Using the Auto Read Status feature prevents timeout issues on the
two operations with none or wrong timing register setup.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/nand/nand_mrvl_nfc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c index 60c34c21af..ac530fc624 100644 --- a/drivers/mtd/nand/nand_mrvl_nfc.c +++ b/drivers/mtd/nand/nand_mrvl_nfc.c @@ -562,6 +562,7 @@ static int prepare_set_command(struct mrvl_nand_host *host, int command, case NAND_CMD_PAGEPROG: host->ndcb0 |= NDCB0_CMD_TYPE(0x1) + | NDCB0_AUTO_RS | NDCB0_DBC | (NAND_CMD_PAGEPROG << 8) | NAND_CMD_SEQIN @@ -599,6 +600,7 @@ static int prepare_set_command(struct mrvl_nand_host *host, int command, case NAND_CMD_ERASE1: host->ndcb0 |= NDCB0_CMD_TYPE(2) + | NDCB0_AUTO_RS | NDCB0_ADDR_CYC(3) | NDCB0_DBC | (NAND_CMD_ERASE2 << 8) |