diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-03-16 15:12:51 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-03-16 15:12:51 +0100 |
| commit | 2d615bd09f629fda06b5c9006106915cd6783bcd (patch) | |
| tree | 2d1782e33b817b5631aa3ac354978240ae29469d /drivers | |
| parent | 363e4d17ef42894dec44c7bbadbcef8fa02735f0 (diff) | |
| parent | 58d7e12a8af61f26e04bb1c5933aa2d457774dcd (diff) | |
| download | barebox-2d615bd09f629fda06b5c9006106915cd6783bcd.tar.gz barebox-2d615bd09f629fda06b5c9006106915cd6783bcd.tar.xz | |
Merge branch 'for-next/arm' into next
Diffstat (limited to 'drivers')
120 files changed, 292 insertions, 2284 deletions
diff --git a/drivers/Makefile b/drivers/Makefile index 10ec145be5..41a2054db0 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -38,7 +38,7 @@ obj-$(CONFIG_FIRMWARE) += firmware/ obj-$(CONFIG_FPGA) += fpga/ obj-$(CONFIG_GENERIC_PHY) += phy/ obj-$(CONFIG_HAB) += hab/ -obj-$(CONFIG_CRYPTO_HW) += crypto/ +obj-y += crypto/ obj-$(CONFIG_AIODEV) += aiodev/ obj-y += memory/ obj-y += soc/ @@ -47,3 +47,4 @@ obj-y += ddr/ obj-y += power/ obj-$(CONFIG_SOUND) += sound/ obj-y += virtio/ +obj-$(CONFIG_HAVE_OPTEE) += tee/optee/of.o diff --git a/drivers/ata/sata-imx.c b/drivers/ata/sata-imx.c index fce72987bb..dc3a5c5fd5 100644 --- a/drivers/ata/sata-imx.c +++ b/drivers/ata/sata-imx.c @@ -10,8 +10,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <malloc.h> -#include <mach/imx53-regs.h> -#include <mach/imx6-regs.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/imx6-regs.h> #include <mfd/imx6q-iomuxc-gpr.h> #include "ahci.h" diff --git a/drivers/base/power.c b/drivers/base/power.c index 8e999c3e14..2db24329dd 100644 --- a/drivers/base/power.c +++ b/drivers/base/power.c @@ -237,6 +237,13 @@ static int __genpd_dev_pm_attach(struct device *dev, struct device_node *np, return ret ?: 1; } +static bool have_genpd_providers; + +void genpd_activate(void) +{ + have_genpd_providers = true; +} + /** * genpd_dev_pm_attach - Attach a device to its PM domain using DT. * @dev: Device to attach. @@ -255,6 +262,9 @@ int genpd_dev_pm_attach(struct device *dev) if (!dev->of_node) return 0; + if (!have_genpd_providers) + return 0; + /* * Devices with multiple PM domains must be attached separately, as we * can only attach one PM domain per device. diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c index 46fe5dd398..5d4dbeb4df 100644 --- a/drivers/bus/mvebu-mbus.c +++ b/drivers/bus/mvebu-mbus.c @@ -60,7 +60,7 @@ #include <of.h> #include <of_address.h> #include <linux/mbus.h> -#include <mach/common.h> +#include <mach/mvebu/common.h> /* DDR target is the same on all platforms */ #define TARGET_DDR 0 diff --git a/drivers/bus/omap-gpmc.c b/drivers/bus/omap-gpmc.c index 1f4580e5d7..4661220c86 100644 --- a/drivers/bus/omap-gpmc.c +++ b/drivers/bus/omap-gpmc.c @@ -16,8 +16,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/mtd/rawnand.h> -#include <mach/gpmc_nand.h> -#include <mach/gpmc.h> +#include <mach/omap/gpmc_nand.h> +#include <mach/omap/gpmc.h> #define GPMC_CS_NUM 8 #define GPMC_NR_WAITPINS 4 diff --git a/drivers/clk/clk-rpi.c b/drivers/clk/clk-rpi.c index 49d69709d2..14359c5eb1 100644 --- a/drivers/clk/clk-rpi.c +++ b/drivers/clk/clk-rpi.c @@ -8,9 +8,9 @@ #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/core.h> -#include <mach/mbox.h> -#include <mach/platform.h> +#include <mach/bcm283x/core.h> +#include <mach/bcm283x/mbox.h> +#include <mach/bcm283x/platform.h> #include <dt-bindings/clock/bcm2835.h> #define BCM2711_CLOCK_END (BCM2711_CLOCK_EMMC2 + 1) diff --git a/drivers/clk/imx/clk-imx1.c b/drivers/clk/imx/clk-imx1.c index 7c6e09316e..e44f71ffcc 100644 --- a/drivers/clk/imx/clk-imx1.c +++ b/drivers/clk/imx/clk-imx1.c @@ -10,7 +10,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx1-regs.h> +#include <mach/imx/imx1-regs.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx21.c b/drivers/clk/imx/clk-imx21.c index 57ad1b466b..bdbd1c7983 100644 --- a/drivers/clk/imx/clk-imx21.c +++ b/drivers/clk/imx/clk-imx21.c @@ -12,7 +12,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx21-regs.h> +#include <mach/imx/imx21-regs.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c index 285a1b5a05..d0ab4008d0 100644 --- a/drivers/clk/imx/clk-imx25.c +++ b/drivers/clk/imx/clk-imx25.c @@ -10,7 +10,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx25-regs.h> +#include <mach/imx/imx25-regs.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c index 3a4be36d2a..1489fd1be7 100644 --- a/drivers/clk/imx/clk-imx27.c +++ b/drivers/clk/imx/clk-imx27.c @@ -6,9 +6,9 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx27-regs.h> -#include <mach/generic.h> -#include <mach/revision.h> +#include <mach/imx/imx27-regs.h> +#include <mach/imx/generic.h> +#include <mach/imx/revision.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index adee9b83b6..349e4d20b4 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -10,7 +10,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx31-regs.h> +#include <mach/imx/imx31-regs.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c index f8f503cb99..cd67d67b16 100644 --- a/drivers/clk/imx/clk-imx35.c +++ b/drivers/clk/imx/clk-imx35.c @@ -9,7 +9,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx35-regs.h> +#include <mach/imx/imx35-regs.h> #include <reset_source.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx5.c b/drivers/clk/imx/clk-imx5.c index 68df361fb4..b6cb645ac1 100644 --- a/drivers/clk/imx/clk-imx5.c +++ b/drivers/clk/imx/clk-imx5.c @@ -10,9 +10,9 @@ #include <of.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx50-regs.h> -#include <mach/imx51-regs.h> -#include <mach/imx53-regs.h> +#include <mach/imx/imx50-regs.h> +#include <mach/imx/imx51-regs.h> +#include <mach/imx/imx53-regs.h> #include <dt-bindings/clock/imx5-clock.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c index 6d2d5329cf..f03696fbbc 100644 --- a/drivers/clk/imx/clk-imx6.c +++ b/drivers/clk/imx/clk-imx6.c @@ -12,9 +12,9 @@ #include <of.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx6-regs.h> -#include <mach/revision.h> -#include <mach/imx6.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/revision.h> +#include <mach/imx/imx6.h> #include <dt-bindings/clock/imx6qdl-clock.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c index ca184b4a44..7159ffb8d9 100644 --- a/drivers/clk/imx/clk-imx6sl.c +++ b/drivers/clk/imx/clk-imx6sl.c @@ -12,9 +12,9 @@ #include <linux/clkdev.h> #include <linux/err.h> #include <linux/clk.h> -#include <mach/imx6-regs.h> -#include <mach/revision.h> -#include <mach/imx6.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/revision.h> +#include <mach/imx/imx6.h> #include "clk.h" #include "common.h" diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c index 57840b4c3c..21b40a73a2 100644 --- a/drivers/clk/imx/clk-imx6sx.c +++ b/drivers/clk/imx/clk-imx6sx.c @@ -12,9 +12,9 @@ #include <linux/clkdev.h> #include <linux/err.h> #include <linux/clk.h> -#include <mach/imx6-regs.h> -#include <mach/revision.h> -#include <mach/imx6.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/revision.h> +#include <mach/imx/imx6.h> #include "clk.h" #include "common.h" diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c index 08546009b3..f3ee60794d 100644 --- a/drivers/clk/imx/clk-imx6ul.c +++ b/drivers/clk/imx/clk-imx6ul.c @@ -11,9 +11,9 @@ #include <of.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx6-regs.h> -#include <mach/revision.h> -#include <mach/imx6.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/revision.h> +#include <mach/imx/imx6.h> #include <dt-bindings/clock/imx6ul-clock.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-imx7.c b/drivers/clk/imx/clk-imx7.c index 15254d10df..0b8e96b87d 100644 --- a/drivers/clk/imx/clk-imx7.c +++ b/drivers/clk/imx/clk-imx7.c @@ -12,8 +12,8 @@ #include <of.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx7-regs.h> -#include <mach/revision.h> +#include <mach/imx/imx7-regs.h> +#include <mach/imx/revision.h> #include <dt-bindings/clock/imx7d-clock.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c index 1bd1fe5c44..89899e0dc9 100644 --- a/drivers/clk/imx/clk-vf610.c +++ b/drivers/clk/imx/clk-vf610.c @@ -13,8 +13,8 @@ #include <linux/clk.h> #include <notifier.h> #include <dt-bindings/clock/vf610-clock.h> -#include <mach/vf610-regs.h> -#include <mach/vf610-fusemap.h> +#include <mach/imx/vf610-regs.h> +#include <mach/imx/vf610-fusemap.h> #include "clk.h" diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index b207e5f194..aa342f3d1b 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -10,7 +10,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx23-regs.h> +#include <mach/mxs/imx23-regs.h> #include "clk.h" diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index 3edf430464..190c997403 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -10,7 +10,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx28-regs.h> +#include <mach/mxs/imx28-regs.h> #include <of_address.h> #include "clk.h" diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index fdbb016e7f..a45a445de6 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -853,7 +853,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, struct rockchip_pll_rate_table *rate_table, unsigned long flags, u8 clk_pll_flags) { - const char *pll_parents[3]; + const char *pll_parents[3] = {}; struct clk_init_data init; struct rockchip_clk_pll *pll; struct clk_mux *pll_mux; @@ -895,7 +895,8 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, /* the actual muxing is xin24m, pll-output, xin32k */ pll_parents[0] = parent_names[0]; pll_parents[1] = pll_name; - pll_parents[2] = parent_names[1]; + if (num_parents > 1) + pll_parents[2] = parent_names[1]; init.name = name; init.flags = CLK_SET_RATE_PARENT; diff --git a/drivers/clk/socfpga/clk-gate-a10.c b/drivers/clk/socfpga/clk-gate-a10.c index cbdec98fc6..a78732124e 100644 --- a/drivers/clk/socfpga/clk-gate-a10.c +++ b/drivers/clk/socfpga/clk-gate-a10.c @@ -9,8 +9,8 @@ #include <regmap.h> #include <linux/clk.h> #include <linux/clkdev.h> -#include <mach/arria10-regs.h> -#include <mach/arria10-system-manager.h> +#include <mach/socfpga/arria10-regs.h> +#include <mach/socfpga/arria10-system-manager.h> #include "clk.h" diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 0d364f318d..32f57cc2e4 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -13,7 +13,7 @@ #include <linux/clk.h> #include <linux/err.h> -#include <mach/iomap.h> +#include <mach/tegra/iomap.h> #include "clk.h" diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 18cfac33e9..bad8110829 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -12,9 +12,9 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/lowlevel.h> -#include <mach/tegra20-car.h> -#include <mach/tegra30-car.h> +#include <mach/tegra/lowlevel.h> +#include <mach/tegra/tegra20-car.h> +#include <mach/tegra/tegra30-car.h> #include "clk.h" diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 2ecfa33561..319c7bc7c1 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -12,8 +12,8 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/lowlevel.h> -#include <mach/tegra20-car.h> +#include <mach/tegra/lowlevel.h> +#include <mach/tegra/tegra20-car.h> #include "clk.h" diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index b602832bc6..0cecc19b66 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -12,9 +12,9 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/lowlevel.h> -#include <mach/tegra20-car.h> -#include <mach/tegra30-car.h> +#include <mach/tegra/lowlevel.h> +#include <mach/tegra/tegra20-car.h> +#include <mach/tegra/tegra30-car.h> #include "clk.h" diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index 26ff9f2580..ad384d8d4d 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c @@ -8,7 +8,7 @@ #include <common.h> #include <linux/clk.h> #include <linux/reset-controller.h> -#include <mach/lowlevel.h> +#include <mach/tegra/lowlevel.h> #include "clk.h" diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index 53b4592c7f..8e4beda295 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq/clkc.c @@ -15,7 +15,7 @@ #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/zynq7000-regs.h> +#include <mach/zynq/zynq7000-regs.h> #include <malloc.h> enum zynq_clk { diff --git a/drivers/clk/zynqmp/clk-divider-zynqmp.c b/drivers/clk/zynqmp/clk-divider-zynqmp.c index 38c7baa0c6..d78cda38b7 100644 --- a/drivers/clk/zynqmp/clk-divider-zynqmp.c +++ b/drivers/clk/zynqmp/clk-divider-zynqmp.c @@ -11,7 +11,7 @@ #include <common.h> #include <linux/clk.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #include "clk-zynqmp.h" diff --git a/drivers/clk/zynqmp/clk-gate-zynqmp.c b/drivers/clk/zynqmp/clk-gate-zynqmp.c index 7b5a432aa8..daa17c34b8 100644 --- a/drivers/clk/zynqmp/clk-gate-zynqmp.c +++ b/drivers/clk/zynqmp/clk-gate-zynqmp.c @@ -11,7 +11,7 @@ #include <common.h> #include <linux/clk.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #include "clk-zynqmp.h" diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index 29bd9e6ef0..fe31cff4b6 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -11,7 +11,7 @@ #include <common.h> #include <linux/clk.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #include "clk-zynqmp.h" diff --git a/drivers/clk/zynqmp/clk-pll-zynqmp.c b/drivers/clk/zynqmp/clk-pll-zynqmp.c index 791f31a5a5..b386780f18 100644 --- a/drivers/clk/zynqmp/clk-pll-zynqmp.c +++ b/drivers/clk/zynqmp/clk-pll-zynqmp.c @@ -11,7 +11,7 @@ #include <common.h> #include <linux/clk.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #include "clk-zynqmp.h" diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index afa6693caf..9dd58a2db3 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c @@ -14,7 +14,7 @@ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clkdev.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #include "clk-zynqmp.h" diff --git a/drivers/clocksource/rk_timer.c b/drivers/clocksource/rk_timer.c index 36aa6949e3..af5d48670d 100644 --- a/drivers/clocksource/rk_timer.c +++ b/drivers/clocksource/rk_timer.c @@ -10,12 +10,20 @@ #include <clock.h> #include <init.h> #include <io.h> -#include <mach/timer.h> #include <stdio.h> -#include <mach/hardware.h> -#include <mach/cru_rk3288.h> +#include <mach/rockchip/hardware.h> +#include <mach/rockchip/cru_rk3288.h> #include <common.h> +struct rk_timer { + unsigned int timer_load_count0; + unsigned int timer_load_count1; + unsigned int timer_curr_value0; + unsigned int timer_curr_value1; + unsigned int timer_ctrl_reg; + unsigned int timer_int_status; +}; + struct rk_timer *timer_ptr; static uint64_t rockchip_get_ticks(void) diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c index 1b0f2150db..63244faad0 100644 --- a/drivers/clocksource/timer-atmel-pit.c +++ b/drivers/clocksource/timer-atmel-pit.c @@ -15,8 +15,8 @@ #include <common.h> #include <init.h> #include <clock.h> -#include <mach/hardware.h> -#include <mach/at91_pit.h> +#include <mach/at91/hardware.h> +#include <mach/at91/at91_pit.h> #include <io.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index 658e0a226c..2b3ef4360a 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -16,12 +16,12 @@ #include <clock.h> #include <init.h> #include <io.h> -#include <mach/omap3-silicon.h> -#include <mach/omap4-silicon.h> -#include <mach/clocks.h> -#include <mach/timers.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap4-silicon.h> +#include <mach/omap/clocks.h> +#include <mach/omap/timers.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> /** Sync 32Khz Timer registers */ #define S32K_CR 0x10 diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 17412198b9..88bc61dbbf 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -21,8 +21,8 @@ #include <clock.h> #include <init.h> #include <io.h> -#include <mach/am33xx-silicon.h> -#include <mach/am33xx-clock.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/am33xx-clock.h> #include <stdio.h> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 6b7966e5c2..594c791273 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -1,11 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only -menuconfig CRYPTO_HW - bool "Hardware crypto devices" - -if CRYPTO_HW +menu "Hardware crypto devices" source "drivers/crypto/caam/Kconfig" source "drivers/crypto/imx-scc/Kconfig" -endif +endmenu diff --git a/drivers/ddr/imx8m/ddr_init.c b/drivers/ddr/imx8m/ddr_init.c index 18969ddb53..1645368006 100644 --- a/drivers/ddr/imx8m/ddr_init.c +++ b/drivers/ddr/imx8m/ddr_init.c @@ -9,9 +9,9 @@ #include <errno.h> #include <io.h> #include <soc/imx8m/ddr.h> -#include <mach/generic.h> -#include <mach/imx8m-regs.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8m-regs.h> +#include <mach/imx/imx8m-ccm-regs.h> bool imx8m_ddr_old_spreadsheet = true; diff --git a/drivers/ddr/imx8m/ddrphy_train.c b/drivers/ddr/imx8m/ddrphy_train.c index e9d35afdfb..6a98fa0545 100644 --- a/drivers/ddr/imx8m/ddrphy_train.c +++ b/drivers/ddr/imx8m/ddrphy_train.c @@ -9,7 +9,7 @@ #include <linux/kernel.h> #include <soc/imx8m/ddr.h> #include <firmware.h> -#include <mach/imx8m-regs.h> +#include <mach/imx/imx8m-regs.h> static const u16 *lpddr4_imem_1d; static size_t lpddr4_imem_1d_size; diff --git a/drivers/ddr/imx8m/ddrphy_utils.c b/drivers/ddr/imx8m/ddrphy_utils.c index 7f863a1736..353a265136 100644 --- a/drivers/ddr/imx8m/ddrphy_utils.c +++ b/drivers/ddr/imx8m/ddrphy_utils.c @@ -10,8 +10,8 @@ #include <io.h> #include <linux/iopoll.h> #include <soc/imx8m/ddr.h> -#include <mach/imx8m-regs.h> -#include <mach/imx8m-ccm-regs.h> +#include <mach/imx/imx8m-regs.h> +#include <mach/imx/imx8m-ccm-regs.h> /* DDR Transfer rate, bus clock is transfer rate / 2, and the DDRC runs at bus * clock / 2, which is therefor transfer rate / 4. */ diff --git a/drivers/firmware/socfpga.c b/drivers/firmware/socfpga.c index b6bc15785b..4655559c7a 100644 --- a/drivers/firmware/socfpga.c +++ b/drivers/firmware/socfpga.c @@ -14,10 +14,10 @@ #include <fcntl.h> #include <init.h> #include <io.h> -#include <mach/cyclone5-system-manager.h> -#include <mach/cyclone5-reset-manager.h> -#include <mach/cyclone5-regs.h> -#include <mach/cyclone5-sdram.h> +#include <mach/socfpga/cyclone5-system-manager.h> +#include <mach/socfpga/cyclone5-reset-manager.h> +#include <mach/socfpga/cyclone5-regs.h> +#include <mach/socfpga/cyclone5-sdram.h> #include <asm/fncpy.h> #include <mmu.h> #include <asm/cache.h> diff --git a/drivers/firmware/zynqmp-fpga.c b/drivers/firmware/zynqmp-fpga.c index f4e8456843..2544d015d6 100644 --- a/drivers/firmware/zynqmp-fpga.c +++ b/drivers/firmware/zynqmp-fpga.c @@ -15,7 +15,7 @@ #include <common.h> #include <init.h> #include <dma.h> -#include <mach/firmware-zynqmp.h> +#include <mach/zynqmp/firmware-zynqmp.h> #define ZYNQMP_PM_FEATURE_BYTE_ORDER_IRREL BIT(0) #define ZYNQMP_PM_FEATURE_SIZE_NOT_NEEDED BIT(1) diff --git a/drivers/gpio/gpio-raspberrypi-exp.c b/drivers/gpio/gpio-raspberrypi-exp.c index c6344996db..3eba43a918 100644 --- a/drivers/gpio/gpio-raspberrypi-exp.c +++ b/drivers/gpio/gpio-raspberrypi-exp.c @@ -11,7 +11,7 @@ #include <common.h> #include <gpio.h> #include <init.h> -#include <mach/mbox.h> +#include <mach/bcm283x/mbox.h> #define NUM_GPIO 8 diff --git a/drivers/hab/hab.c b/drivers/hab/hab.c index 2746f27a1e..65384a6c10 100644 --- a/drivers/hab/hab.c +++ b/drivers/hab/hab.c @@ -9,10 +9,10 @@ #include <hab.h> #include <regmap.h> #include <fs.h> -#include <mach/iim.h> -#include <mach/imx25-fusemap.h> -#include <mach/ocotp.h> -#include <mach/imx6-fusemap.h> +#include <mach/imx/iim.h> +#include <mach/imx/imx25-fusemap.h> +#include <mach/imx/ocotp.h> +#include <mach/imx/imx6-fusemap.h> bool imx_hab_srk_hash_valid(const void *buf) { diff --git a/drivers/hab/habv3.c b/drivers/hab/habv3.c index 235db78c10..4818dae7d1 100644 --- a/drivers/hab/habv3.c +++ b/drivers/hab/habv3.c @@ -5,7 +5,7 @@ #include <common.h> #include <hab.h> #include <io.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> struct hab_status { u8 value; diff --git a/drivers/hab/habv4.c b/drivers/hab/habv4.c index 9101fc1cae..252e38f655 100644 --- a/drivers/hab/habv4.c +++ b/drivers/hab/habv4.c @@ -14,8 +14,8 @@ #include <linux/arm-smccc.h> #include <asm/cache.h> -#include <mach/generic.h> -#include <mach/imx8mq.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx8mq.h> #define HABV4_RVT_IMX28 0xffff8af8 #define HABV4_RVT_IMX6_OLD 0x00000094 diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index d9436b17c0..5cf33039ed 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -28,8 +28,8 @@ #include <io.h> #include <i2c/i2c.h> -#include <mach/generic.h> -#include <mach/omap3-clock.h> +#include <mach/omap/generic.h> +#include <mach/omap/omap3-clock.h> /* This will be the driver name */ #define DRIVER_NAME "i2c-omap" diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig index 21d53c0c3f..bbdca67e9d 100644 --- a/drivers/mci/Kconfig +++ b/drivers/mci/Kconfig @@ -87,13 +87,6 @@ config MCI_ROCKCHIP_DWCMSHC Enable this entry to add support for a Rockchip derivation of the DWCMSHC controller found on some Rockchip SoCs like the RK3568. -config MCI_S3C - bool "S3C" - depends on ARCH_S3C24xx - help - Enable this entry to add support to read and write SD cards on a - Samsung S3C24xx based system. - config MCI_BCM283X bool "MCI support for BCM283X" depends on ARCH_BCM283X || COMPILE_TEST diff --git a/drivers/mci/Makefile b/drivers/mci/Makefile index 55ec97b3fe..e3dc5ad8ae 100644 --- a/drivers/mci/Makefile +++ b/drivers/mci/Makefile @@ -14,7 +14,6 @@ pbl-$(CONFIG_MCI_IMX_ESDHC_PBL) += imx-esdhc-pbl.o imx-esdhc-common.o obj-$(CONFIG_MCI_MXS) += mxs.o obj-$(CONFIG_MCI_OMAP_HSMMC) += omap_hsmmc.o obj-$(CONFIG_MCI_PXA) += pxamci.o -obj-$(CONFIG_MCI_S3C) += s3c.o obj-$(CONFIG_MCI_ROCKCHIP_DWCMSHC) += rockchip-dwcmshc-sdhci.o obj-$(CONFIG_MCI_TEGRA) += tegra-sdmmc.o obj-$(CONFIG_MCI_SPI) += mci_spi.o diff --git a/drivers/mci/atmel-sdhci-common.c b/drivers/mci/atmel-sdhci-common.c index 129480aa55..05a019beb6 100644 --- a/drivers/mci/atmel-sdhci-common.c +++ b/drivers/mci/atmel-sdhci-common.c @@ -13,7 +13,7 @@ #include <mci.h> #include <linux/bitfield.h> -#include <mach/early_udelay.h> +#include <mach/at91/early_udelay.h> #ifdef __PBL__ #define udelay early_udelay diff --git a/drivers/mci/atmel-sdhci-pbl.c b/drivers/mci/atmel-sdhci-pbl.c index 2c5f107abd..f5a7279bff 100644 --- a/drivers/mci/atmel-sdhci-pbl.c +++ b/drivers/mci/atmel-sdhci-pbl.c @@ -11,10 +11,10 @@ #include <pbl/bio.h> #include <mci.h> #include <debug_ll.h> -#include <mach/xload.h> +#include <mach/at91/xload.h> #include "atmel-sdhci.h" -#include <mach/early_udelay.h> +#include <mach/at91/early_udelay.h> #ifdef __PBL__ #define udelay early_udelay diff --git a/drivers/mci/atmel_mci_pbl.c b/drivers/mci/atmel_mci_pbl.c index 65d8b3632a..7483e9375f 100644 --- a/drivers/mci/atmel_mci_pbl.c +++ b/drivers/mci/atmel_mci_pbl.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> -#include <mach/xload.h> +#include <mach/at91/xload.h> #include <mci.h> #include "atmel-mci-regs.h" diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c index c81eba5b9d..40c2882dc4 100644 --- a/drivers/mci/imx-esdhc-pbl.c +++ b/drivers/mci/imx-esdhc-pbl.c @@ -8,14 +8,17 @@ #include <linux/sizes.h> #include <asm/sections.h> #include <asm/cache.h> -#include <mach/xload.h> +#include <mach/imx/xload.h> #ifdef CONFIG_ARCH_IMX -#include <mach/atf.h> -#include <mach/imx6-regs.h> -#include <mach/imx7-regs.h> -#include <mach/imx8mq-regs.h> -#include <mach/imx8mm-regs.h> -#include <mach/imx-header.h> +#include <mach/imx/atf.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx7-regs.h> +#include <mach/imx/imx8mq-regs.h> +#include <mach/imx/imx8mm-regs.h> +#include <mach/imx/imx-header.h> +#endif +#ifdef CONFIG_ARCH_LS1046 +#include <mach/layerscape/xload.h> #endif #include "sdhci.h" #include "imx-esdhc.h" diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c index 8e0753fe95..7c19032230 100644 --- a/drivers/mci/mxs.c +++ b/drivers/mci/mxs.c @@ -27,9 +27,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <asm/bitops.h> -#include <mach/mci.h> -#include <mach/clock.h> -#include <mach/ssp.h> +#include <mach/mxs/mci.h> +#include <mach/mxs/ssp.h> #define CLOCKRATE_MIN (1 * 1000 * 1000) #define CLOCKRATE_MAX (480 * 1000 * 1000) diff --git a/drivers/mci/omap_hsmmc.c b/drivers/mci/omap_hsmmc.c index 205d5b434a..0052d89525 100644 --- a/drivers/mci/omap_hsmmc.c +++ b/drivers/mci/omap_hsmmc.c @@ -12,12 +12,12 @@ #include <io.h> #include <linux/err.h> -#include <mach/omap_hsmmc.h> +#include <mach/omap/omap_hsmmc.h> #if defined(CONFIG_MFD_TWL6030) && \ defined(CONFIG_MCI_OMAP_HSMMC) && \ defined(CONFIG_ARCH_OMAP4) -#include <mach/omap4_twl6030_mmc.h> +#include <mach/omap/omap4_twl6030_mmc.h> #endif struct hsmmc { diff --git a/drivers/mci/pxamci.c b/drivers/mci/pxamci.c index d5807c0fc9..8d8e9e88bb 100644 --- a/drivers/mci/pxamci.c +++ b/drivers/mci/pxamci.c @@ -15,9 +15,9 @@ #include <mci.h> #include <linux/err.h> -#include <mach/clock.h> -#include <mach/mci_pxa2xx.h> -#include <mach/pxa-regs.h> +#include <mach/pxa/clock.h> +#include <mach/pxa/mci_pxa2xx.h> +#include <mach/pxa/pxa-regs.h> #include "pxamci.h" #define DRIVER_NAME "pxa-mmc" diff --git a/drivers/mci/s3c.c b/drivers/mci/s3c.c deleted file mode 100644 index f1d00ecdc2..0000000000 --- a/drivers/mci/s3c.c +++ /dev/null @@ -1,762 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -// SPDX-FileCopyrightText: 2010 Juergen Beisert <juergen@kreuzholzen.de> -// SPDX-FileCopyrightText: 2004-2006 Thomas Kleffel <tk@maintech.de>, maintech GmbH -// SPDX-FileCopyrightText: 2008 Simtec Electronics <ben-linux@fluff.org> -// SPDX-FileCopyrightText: 2006 OpenMoko, Inc (Harald Welte <laforge@openmoko.org>) -// SPDX-FileCopyrightText: 2005 Thomas Kleffel - -/* - * This code is partially based on Linux and u-boot sources, among others the - * u-boot pxa MMC driver and linux/drivers/mmc/s3c2410mci.c. - */ - -/** - * @file - * @brief MCI card host interface for S3C2440 CPU - */ - -/* #define DEBUG */ - -#include <common.h> -#include <init.h> -#include <mci.h> -#include <errno.h> -#include <clock.h> -#include <io.h> -#include <linux/err.h> -#include <mach/s3c-mci.h> -#include <mach/s3c-generic.h> -#include <mach/s3c-iomap.h> - -#define GET_HOST_DATA(x) (x->priv) -#define GET_MCI_PDATA(x) (x->platform_data) - -#define SDICON 0x0 -# define SDICON_SDRESET (1 << 8) -# define SDICON_MMCCLOCK (1 << 5) /* this is a clock type SD or MMC style WTF? */ -# define SDICON_BYTEORDER (1 << 4) -# define SDICON_SDIOIRQ (1 << 3) -# define SDICON_RWAITEN (1 << 2) -# define SDICON_FIFORESET (1 << 1) /* reserved bit on 2440 ????? */ -# define SDICON_CLKEN (1 << 0) /* enable/disable external clock */ - -#define SDIPRE 0x4 - -#define SDICMDARG 0x8 - -#define SDICMDCON 0xc -# define SDICMDCON_ABORT (1 << 12) -# define SDICMDCON_WITHDATA (1 << 11) -# define SDICMDCON_LONGRSP (1 << 10) -# define SDICMDCON_WAITRSP (1 << 9) -# define SDICMDCON_CMDSTART (1 << 8) -# define SDICMDCON_SENDERHOST (1 << 6) -# define SDICMDCON_INDEX (0x3f) - -#define SDICMDSTAT 0x10 -# define SDICMDSTAT_CRCFAIL (1 << 12) -# define SDICMDSTAT_CMDSENT (1 << 11) -# define SDICMDSTAT_CMDTIMEOUT (1 << 10) -# define SDICMDSTAT_RSPFIN (1 << 9) -# define SDICMDSTAT_XFERING (1 << 8) -# define SDICMDSTAT_INDEX (0xff) - -#define SDIRSP0 0x14 -#define SDIRSP1 0x18 -#define SDIRSP2 0x1C -#define SDIRSP3 0x20 - -#define SDITIMER 0x24 -#define SDIBSIZE 0x28 - -#define SDIDCON 0x2c -# define SDIDCON_DS_BYTE (0 << 22) -# define SDIDCON_DS_HALFWORD (1 << 22) -# define SDIDCON_DS_WORD (2 << 22) -# define SDIDCON_IRQPERIOD (1 << 21) -# define SDIDCON_TXAFTERRESP (1 << 20) -# define SDIDCON_RXAFTERCMD (1 << 19) -# define SDIDCON_BUSYAFTERCMD (1 << 18) -# define SDIDCON_BLOCKMODE (1 << 17) -# define SDIDCON_WIDEBUS (1 << 16) -# define SDIDCON_DMAEN (1 << 15) -# define SDIDCON_STOP (0 << 14) -# define SDIDCON_DATSTART (1 << 14) -# define SDIDCON_DATMODE (3 << 12) -# define SDIDCON_BLKNUM (0xfff) -# define SDIDCON_XFER_READY (0 << 12) -# define SDIDCON_XFER_CHKSTART (1 << 12) -# define SDIDCON_XFER_RXSTART (2 << 12) -# define SDIDCON_XFER_TXSTART (3 << 12) - -#define SDIDCNT 0x30 -# define SDIDCNT_BLKNUM_SHIFT 12 - -#define SDIDSTA 0x34 -# define SDIDSTA_RDYWAITREQ (1 << 10) -# define SDIDSTA_SDIOIRQDETECT (1 << 9) -# define SDIDSTA_FIFOFAIL (1 << 8) /* reserved on 2440 */ -# define SDIDSTA_CRCFAIL (1 << 7) -# define SDIDSTA_RXCRCFAIL (1 << 6) -# define SDIDSTA_DATATIMEOUT (1 << 5) -# define SDIDSTA_XFERFINISH (1 << 4) -# define SDIDSTA_BUSYFINISH (1 << 3) -# define SDIDSTA_SBITERR (1 << 2) /* reserved on 2410a/2440 */ -# define SDIDSTA_TXDATAON (1 << 1) -# define SDIDSTA_RXDATAON (1 << 0) - -#define SDIFSTA 0x38 -# define SDIFSTA_FIFORESET (1<<16) -# define SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */ -# define SDIFSTA_TFDET (1<<13) -# define SDIFSTA_RFDET (1<<12) -# define SDIFSTA_TFHALF (1<<11) -# define SDIFSTA_TFEMPTY (1<<10) -# define SDIFSTA_RFLAST (1<<9) -# define SDIFSTA_RFFULL (1<<8) -# define SDIFSTA_RFHALF (1<<7) -# define SDIFSTA_COUNTMASK (0x7f) - -#define SDIIMSK 0x3C -# define SDIIMSK_RESPONSECRC (1<<17) -# define SDIIMSK_CMDSENT (1<<16) -# define SDIIMSK_CMDTIMEOUT (1<<15) -# define SDIIMSK_RESPONSEND (1<<14) -# define SDIIMSK_READWAIT (1<<13) -# define SDIIMSK_SDIOIRQ (1<<12) -# define SDIIMSK_FIFOFAIL (1<<11) -# define SDIIMSK_CRCSTATUS (1<<10) -# define SDIIMSK_DATACRC (1<<9) -# define SDIIMSK_DATATIMEOUT (1<<8) -# define SDIIMSK_DATAFINISH (1<<7) -# define SDIIMSK_BUSYFINISH (1<<6) -# define SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */ -# define SDIIMSK_TXFIFOHALF (1<<4) -# define SDIIMSK_TXFIFOEMPTY (1<<3) -# define SDIIMSK_RXFIFOLAST (1<<2) -# define SDIIMSK_RXFIFOFULL (1<<1) -# define SDIIMSK_RXFIFOHALF (1<<0) - -#define SDIDATA 0x40 - -struct s3c_mci_host { - struct mci_host host; - void __iomem *base; - int bus_width:2; /* 0 = 1 bit, 1 = 4 bit, 2 = 8 bit */ - unsigned clock; /* current clock in Hz */ - unsigned data_size; /* data transfer in bytes */ -}; - -#define to_s3c_host(h) container_of(h, struct s3c_mci_host, host) - -/** - * Finish a request - * @param hw_dev Host interface instance - * - * Just a little bit paranoia. - */ -static void s3c_finish_request(struct s3c_mci_host *host_data) -{ - /* TODO ensure the engines are stopped */ -} - -/** - * Setup a new clock frequency on this MCI bus - * @param hw_dev Host interface instance - * @param nc New clock value in Hz (can be 0) - * @return New clock value (may differ from 'nc') - */ -static unsigned s3c_setup_clock_speed(struct s3c_mci_host *host_data, unsigned nc) -{ - unsigned clock; - uint32_t mci_psc; - - if (nc == 0) - return 0; - - clock = s3c_get_pclk(); - /* Calculate the required prescaler value to get the requested frequency */ - mci_psc = (clock + (nc >> 2)) / nc; - - if (mci_psc > 256) { - mci_psc = 256; - pr_warning("SD/MMC clock might be too high!\n"); - } - - writel(mci_psc - 1, host_data->base + SDIPRE); - - return clock / mci_psc; -} - -/** - * Reset the MCI engine (the hard way) - * @param hw_dev Host interface instance - * - * This will reset everything in all registers of this unit! - */ -static void s3c_mci_reset(struct s3c_mci_host *host_data) -{ - /* reset the hardware */ - writel(SDICON_SDRESET, host_data->base + SDICON); - /* wait until reset it finished */ - while (readl(host_data->base + SDICON) & SDICON_SDRESET) - ; -} - -/** - * Initialize hard and software - * @param hw_dev Host interface instance - * @param mci_dev MCI device instance (might be NULL) - */ -static int s3c_mci_initialize(struct s3c_mci_host *host_data, - struct device *mci_dev) -{ - s3c_mci_reset(host_data); - - /* restore last settings */ - host_data->clock = s3c_setup_clock_speed(host_data, host_data->clock); - writel(0x007FFFFF, host_data->base + SDITIMER); - writel(SDICON_MMCCLOCK, host_data->base + SDICON); - writel(512, host_data->base + SDIBSIZE); - - return 0; -} - -/** - * Prepare engine's bits for the next command transfer - * @param cmd_flags MCI's command flags - * @param data_flags MCI's data flags - * @return Register bits for this transfer - */ -static uint32_t s3c_prepare_command_setup(unsigned cmd_flags, unsigned data_flags) -{ - uint32_t reg; - - /* source (=host) */ - reg = SDICMDCON_SENDERHOST; - - if (cmd_flags & MMC_RSP_PRESENT) { - reg |= SDICMDCON_WAITRSP; - pr_debug("Command with response\n"); - } - if (cmd_flags & MMC_RSP_136) { - reg |= SDICMDCON_LONGRSP; - pr_debug("Command with long response\n"); - } - if (cmd_flags & MMC_RSP_CRC) - ; /* FIXME */ - if (cmd_flags & MMC_RSP_BUSY) - ; /* FIXME */ - if (cmd_flags & MMC_RSP_OPCODE) - ; /* FIXME */ - if (data_flags != 0) - reg |= SDICMDCON_WITHDATA; - - return reg; -} - -/** - * Prepare engine's bits for the next data transfer - * @param hw_dev Host interface device instance - * @param data_flags MCI's data flags - * @return Register bits for this transfer - */ -static uint32_t s3c_prepare_data_setup(struct s3c_mci_host *host_data, unsigned data_flags) -{ - uint32_t reg = SDIDCON_BLOCKMODE; /* block mode only is supported */ - - if (host_data->bus_width == 1) - reg |= SDIDCON_WIDEBUS; - - /* enable any kind of data transfers on demand only */ - if (data_flags & MMC_DATA_WRITE) - reg |= SDIDCON_TXAFTERRESP | SDIDCON_XFER_TXSTART; - - if (data_flags & MMC_DATA_READ) - reg |= SDIDCON_RXAFTERCMD | SDIDCON_XFER_RXSTART; - - /* TODO: Support more than the 2440 CPU */ - reg |= SDIDCON_DS_WORD | SDIDCON_DATSTART; - - return reg; -} - -/** - * Terminate a current running transfer - * @param hw_dev Host interface device instance - * @return 0 on success - * - * Note: Try to stop a running transfer. This should not happen, as all - * transfers must complete in this driver. But who knows... ;-) - */ -static int s3c_terminate_transfer(struct s3c_mci_host *host_data) -{ - unsigned stoptries = 3; - - while (readl(host_data->base + SDIDSTA) & (SDIDSTA_TXDATAON | SDIDSTA_RXDATAON)) { - pr_debug("Transfer still in progress.\n"); - - writel(SDIDCON_STOP, host_data->base + SDIDCON); - s3c_mci_initialize(host_data, NULL); - - if ((stoptries--) == 0) { - pr_warning("Cannot stop the engine!\n"); - return -EINVAL; - } - } - - return 0; -} - -/** - * Setup registers for data transfer - * @param hw_dev Host interface device instance - * @param data The data information (buffer, direction aso.) - * @return 0 on success - */ -static int s3c_prepare_data_transfer(struct s3c_mci_host *host_data, struct mci_data *data) -{ - uint32_t reg; - - writel(data->blocksize, host_data->base + SDIBSIZE); - reg = s3c_prepare_data_setup(host_data, data->flags); - reg |= data->blocks & SDIDCON_BLKNUM; - writel(reg, host_data->base + SDIDCON); - writel(0x007FFFFF, host_data->base + SDITIMER); - - return 0; -} - -/** - * Send a command and receive the response - * @param hw_dev Host interface device instance - * @param cmd The command to handle - * @param data The data information (buffer, direction aso.) - * @return 0 on success - */ -static int s3c_send_command(struct s3c_mci_host *host_data, struct mci_cmd *cmd, - struct mci_data *data) -{ - uint32_t reg, t1; - int rc; - - writel(0x007FFFFF, host_data->base + SDITIMER); - - /* setup argument */ - writel(cmd->cmdarg, host_data->base + SDICMDARG); - - /* setup command and transfer characteristic */ - reg = s3c_prepare_command_setup(cmd->resp_type, data != NULL ? data->flags : 0); - reg |= cmd->cmdidx & SDICMDCON_INDEX; - - /* run the command right now */ - writel(reg | SDICMDCON_CMDSTART, host_data->base + SDICMDCON); - t1 = readl(host_data->base + SDICMDSTAT); - /* wait until command is done */ - while (1) { - reg = readl(host_data->base + SDICMDSTAT); - /* done? */ - if (cmd->resp_type & MMC_RSP_PRESENT) { - if (reg & SDICMDSTAT_RSPFIN) { - writel(SDICMDSTAT_RSPFIN, - host_data->base + SDICMDSTAT); - rc = 0; - break; - } - } else { - if (reg & SDICMDSTAT_CMDSENT) { - writel(SDICMDSTAT_CMDSENT, - host_data->base + SDICMDSTAT); - rc = 0; - break; - } - } - /* timeout? */ - if (reg & SDICMDSTAT_CMDTIMEOUT) { - writel(SDICMDSTAT_CMDTIMEOUT, - host_data->base + SDICMDSTAT); - rc = -ETIMEDOUT; - break; - } - } - - if ((rc == 0) && (cmd->resp_type & MMC_RSP_PRESENT)) { - cmd->response[0] = readl(host_data->base + SDIRSP0); - cmd->response[1] = readl(host_data->base + SDIRSP1); - cmd->response[2] = readl(host_data->base + SDIRSP2); - cmd->response[3] = readl(host_data->base + SDIRSP3); - } - /* do not disable the clock! */ - return rc; -} - -/** - * Clear major registers prior a new transaction - * @param hw_dev Host interface device instance - * @return 0 on success - * - * FIFO clear is only necessary on 2440, but doesn't hurt on 2410 - */ -static int s3c_prepare_engine(struct s3c_mci_host *host_data) -{ - int rc; - - rc = s3c_terminate_transfer(host_data); - if (rc != 0) - return rc; - - writel(-1, host_data->base + SDICMDSTAT); - writel(-1, host_data->base + SDIDSTA); - writel(-1, host_data->base + SDIFSTA); - - return 0; -} - -/** - * Handle MCI commands without data - * @param hw_dev Host interface device instance - * @param cmd The command to handle - * @return 0 on success - * - * This functions handles the following MCI commands: - * - "broadcast command (BC)" without a response - * - "broadcast commands with response (BCR)" - * - "addressed command (AC)" with response, but without data - */ -static int s3c_mci_std_cmds(struct s3c_mci_host *host_data, struct mci_cmd *cmd) -{ - int rc; - - rc = s3c_prepare_engine(host_data); - if (rc != 0) - return 0; - - return s3c_send_command(host_data, cmd, NULL); -} - -/** - * Read one block of data from the FIFO - * @param hw_dev Host interface device instance - * @param data The data information (buffer, direction aso.) - * @return 0 on success - */ -static int s3c_mci_read_block(struct s3c_mci_host *host_data, struct mci_data *data) -{ - uint32_t *p; - unsigned cnt, data_size; - -#define READ_REASON_TO_FAIL (SDIDSTA_CRCFAIL | SDIDSTA_RXCRCFAIL | SDIDSTA_DATATIMEOUT) - - p = (uint32_t*)data->dest; - data_size = data->blocksize * data->blocks; - - while (data_size > 0) { - - /* serious error? */ - if (readl(host_data->base + SDIDSTA) & READ_REASON_TO_FAIL) { - pr_err("Failed while reading data\n"); - return -EIO; - } - - /* now check the FIFO status */ - if (readl(host_data->base + SDIFSTA) & SDIFSTA_FIFOFAIL) { - pr_err("Data loss due to FIFO overflow when reading\n"); - return -EIO; - } - - /* we only want to read full words */ - cnt = (readl(host_data->base + SDIFSTA) & SDIFSTA_COUNTMASK) >> 2; - - /* read one chunk of data from the FIFO */ - while (cnt--) { - *p = readl(host_data->base + SDIDATA); - p++; - if (data_size >= 4) - data_size -= 4; - else { - data_size = 0; - break; - } - } - } - - return 0; -} - -/** - * Write one block of data into the FIFO - * @param hw_dev Host interface device instance - * @param cmd The command to handle - * @param data The data information (buffer, direction aso.) - * @return 0 on success - * - * We must ensure data in the FIFO when the command phase changes into the - * data phase. To ensure this, the FIFO gets filled first, then the command. - */ -static int s3c_mci_write_block(struct s3c_mci_host *host_data, struct mci_cmd *cmd, - struct mci_data *data) -{ - const uint32_t *p = (const uint32_t*)data->src; - unsigned cnt, data_size; - uint32_t reg; - -#define WRITE_REASON_TO_FAIL (SDIDSTA_CRCFAIL | SDIDSTA_DATATIMEOUT) - - data_size = data->blocksize * data->blocks; - /* - * With high clock rates we must fill the FIFO as early as possible - * Its size is 16 words. We assume its empty, when this function is - * entered. - */ - cnt = 16; - while (cnt--) { - writel(*p, host_data->base + SDIDATA); - p++; - if (data_size >= 4) - data_size -= 4; - else { - data_size = 0; - break; - } - } - - /* data is now in place and waits for transmitt. Start the command right now */ - s3c_send_command(host_data, cmd, data); - - if ((reg = readl(host_data->base + SDIFSTA)) & SDIFSTA_FIFOFAIL) { - pr_err("Command fails immediatly due to FIFO underrun when writing %08X\n", - reg); - return -EIO; - } - - while (data_size > 0) { - - if (readl(host_data->base + SDIDSTA) & WRITE_REASON_TO_FAIL) { - pr_err("Failed writing data\n"); - return -EIO; - } - - /* now check the FIFO status */ - if ((reg = readl(host_data->base + SDIFSTA)) & SDIFSTA_FIFOFAIL) { - pr_err("Data loss due to FIFO underrun when writing %08X\n", - reg); - return -EIO; - } - - /* we only want to write full words */ - cnt = 16 - (((readl(host_data->base + SDIFSTA) & SDIFSTA_COUNTMASK) + 3) >> 2); - - /* fill the FIFO if it has free entries */ - while (cnt--) { - writel(*p, host_data->base + SDIDATA); - p++; - if (data_size >= 4) - data_size -= 4; - else { - data_size = 0; - break; - } - } - } - - return 0; -} - -/** - * Handle MCI commands with or without data - * @param hw_dev Host interface device instance - * @param cmd The command to handle - * @param data The data information (buffer, direction aso.) - * @return 0 on success -*/ -static int s3c_mci_adtc(struct s3c_mci_host *host_data, struct mci_cmd *cmd, - struct mci_data *data) -{ - int rc; - - rc = s3c_prepare_engine(host_data); - if (rc != 0) - return rc; - - rc = s3c_prepare_data_transfer(host_data, data); - if (rc != 0) - return rc; - - if (data->flags & MMC_DATA_READ) { - s3c_send_command(host_data, cmd, data); - rc = s3c_mci_read_block(host_data, data); - if (rc == 0) { - while (!(readl(host_data->base + SDIDSTA) & SDIDSTA_XFERFINISH)) - ; - } else - s3c_terminate_transfer(host_data); - } - - if (data->flags & MMC_DATA_WRITE) { - rc = s3c_mci_write_block(host_data, cmd, data); - if (rc == 0) { - while (!(readl(host_data->base + SDIDSTA) & SDIDSTA_XFERFINISH)) - ; - } else - s3c_terminate_transfer(host_data); - } - writel(0, host_data->base + SDIDCON); - - return rc; -} - -/* ------------------------- MCI API -------------------------------------- */ - -/** - * Keep the attached MMC/SD unit in a well know state - * @param host MCI host - * @param mci_dev MCI device instance - * @return 0 on success, negative value else - */ -static int mci_reset(struct mci_host *host, struct device *mci_dev) -{ - struct s3c_mci_host *host_data = to_s3c_host(host); - - return s3c_mci_initialize(host_data, mci_dev); -} - -/** - * Process one command to the MCI card - * @param host MCI host - * @param cmd The command to process - * @param data The data to handle in the command (can be NULL) - * @return 0 on success, negative value else - */ -static int mci_request(struct mci_host *host, struct mci_cmd *cmd, - struct mci_data *data) -{ - struct s3c_mci_host *host_data = to_s3c_host(host); - int rc; - - /* enable clock */ - writel(readl(host_data->base + SDICON) | SDICON_CLKEN, - host_data->base + SDICON); - - if ((cmd->resp_type == 0) || (data == NULL)) - rc = s3c_mci_std_cmds(host_data, cmd); - else - rc = s3c_mci_adtc(host_data, cmd, data); /* with response and data */ - - s3c_finish_request(host_data); - - /* disable clock */ - writel(readl(host_data->base + SDICON) & ~SDICON_CLKEN, - host_data->base + SDICON); - return rc; -} - -/** - * Setup the bus width and IO speed - * @param host MCI host - * @param bus_width New bus width value (1, 4 or 8) - * @param clock New clock in Hz (can be '0' to disable the clock) - */ -static void mci_set_ios(struct mci_host *host, struct mci_ios *ios) -{ - struct s3c_mci_host *host_data = to_s3c_host(host); - uint32_t reg; - - switch (ios->bus_width) { - case MMC_BUS_WIDTH_4: - host_data->bus_width = 1; - break; - case MMC_BUS_WIDTH_1: - host_data->bus_width = 0; - break; - default: - return; - } - - reg = readl(host_data->base + SDICON); - if (ios->clock) { - /* setup the IO clock frequency and enable it */ - host_data->clock = s3c_setup_clock_speed(host_data, ios->clock); - reg |= SDICON_CLKEN; /* enable the clock */ - } else { - reg &= ~SDICON_CLKEN; /* disable the clock */ - host_data->clock = 0; - } - writel(reg, host_data->base + SDICON); - - pr_debug("IO settings: bus width=%d, frequency=%u Hz\n", - host_data->bus_width, host_data->clock); -} - -/* ----------------------------------------------------------------------- */ - -static void s3c_info(struct device *hw_dev) -{ - struct s3c_mci_host *host = hw_dev->priv; - struct s3c_mci_platform_data *pd = hw_dev->platform_data; - - printf(" Bus data width: %d bit\n", host->bus_width == 1 ? 4 : 1); - printf(" Bus frequency: %u Hz\n", host->clock); - printf(" Frequency limits: "); - if (pd->f_min == 0) - printf("no lower limit "); - else - printf("%u Hz lower limit ", pd->f_min); - if (pd->f_max == 0) - printf("- no upper limit"); - else - printf("- %u Hz upper limit", pd->f_max); - printf("\n Card detection support: %s\n", - pd->gpio_detect != 0 ? "yes" : "no"); -} - -static int s3c_mci_probe(struct device *hw_dev) -{ - struct resource *iores; - struct s3c_mci_host *s3c_host; - struct s3c_mci_platform_data *pd = hw_dev->platform_data; - - s3c_host = xzalloc(sizeof(*s3c_host)); - s3c_host->host.send_cmd = mci_request; - s3c_host->host.set_ios = mci_set_ios; - s3c_host->host.init = mci_reset; - - /* TODO replace by the global func: enable the SDI unit clock */ - writel(readl(S3C_CLOCK_POWER_BASE + 0x0c) | 0x200, - S3C_CLOCK_POWER_BASE + 0x0c); - - if (pd == NULL) { - pr_err("Missing platform data\n"); - return -EINVAL; - } - - hw_dev->priv = s3c_host; - iores = dev_request_mem_resource(hw_dev, 0); - if (IS_ERR(iores)) - return PTR_ERR(iores); - s3c_host->base = IOMEM(iores->start); - - s3c_host->host.hw_dev = hw_dev; - - /* feed forward the platform specific values */ - s3c_host->host.voltages = pd->voltages; - s3c_host->host.host_caps = pd->caps; - s3c_host->host.f_min = pd->f_min == 0 ? s3c_get_pclk() / 256 : pd->f_min; - s3c_host->host.f_max = pd->f_max == 0 ? s3c_get_pclk() / 2 : pd->f_max; - - if (IS_ENABLED(CONFIG_MCI_INFO)) - hw_dev->info = s3c_info; - - /* - * Start the clock to let the engine and the card finishes its startup - */ - s3c_host->clock = s3c_setup_clock_speed(s3c_host, pd->f_min); - writel(SDICON_FIFORESET | SDICON_MMCCLOCK, s3c_host->base + SDICON); - - return mci_register(&s3c_host->host); -} - -static struct driver s3c_mci_driver = { - .name = "s3c_mci", - .probe = s3c_mci_probe, -}; -device_platform_driver(s3c_mci_driver); diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 4a673e9440..1cfd65f408 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -113,13 +113,6 @@ config NAND_ATMEL_PMECC help Support for PMECC present on the SoC sam9x5 and sam9n12 -config NAND_S3C24XX - bool - prompt "Samsung S3C24XX NAND driver" - depends on ARCH_S3C24xx - help - Add support for processor's NAND device controller. - config MTD_NAND_ECC_SW_HAMMING_SMC bool "NAND ECC Smart Media byte order" default n diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 1a17c49bff..6258eb2177 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -18,8 +18,6 @@ obj-$(CONFIG_MTD_NAND_OMAP_ELM) += omap_elm.o obj-$(CONFIG_NAND_ORION) += nand_orion.o obj-$(CONFIG_NAND_MRVL_NFC) += nand_mrvl_nfc.o obj-$(CONFIG_NAND_ATMEL) += atmel/ -obj-$(CONFIG_NAND_S3C24XX) += nand_s3c24xx.o -pbl-$(CONFIG_NAND_S3C24XX) += nand_s3c24xx.o obj-$(CONFIG_NAND_MXS) += nand_mxs.o obj-$(CONFIG_MTD_NAND_DENALI) += nand_denali.o obj-$(CONFIG_MTD_NAND_DENALI_DT) += nand_denali_dt.o diff --git a/drivers/mtd/nand/atmel/legacy.c b/drivers/mtd/nand/atmel/legacy.c index 1f804eb537..44cd4d07e8 100644 --- a/drivers/mtd/nand/atmel/legacy.c +++ b/drivers/mtd/nand/atmel/legacy.c @@ -29,7 +29,7 @@ #include <linux/err.h> #include <io.h> -#include <mach/board.h> +#include <mach/at91/board.h> #include <errno.h> diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c index 3438e9fc79..39cb2787f4 100644 --- a/drivers/mtd/nand/nand_imx.c +++ b/drivers/mtd/nand/nand_imx.c @@ -18,8 +18,8 @@ #include <linux/mtd/nand.h> #include <linux/mtd/rawnand.h> #include <linux/clk.h> -#include <mach/generic.h> -#include <mach/imx-nand.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx-nand.h> #include <io.h> #include <of_mtd.h> #include <errno.h> diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c index 213e0d25d4..17099f7db2 100644 --- a/drivers/mtd/nand/nand_mxs.c +++ b/drivers/mtd/nand/nand_mxs.c @@ -32,7 +32,7 @@ #include <io.h> #include <dma/apbh-dma.h> #include <stmp-device.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <soc/imx/gpmi-nand.h> #include "internals.h" diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c index c7252ce72a..c5e50d27c8 100644 --- a/drivers/mtd/nand/nand_omap_gpmc.c +++ b/drivers/mtd/nand/nand_omap_gpmc.c @@ -68,8 +68,8 @@ #include <linux/mtd/rawnand.h> #include <linux/mtd/nand_ecc.h> #include <io.h> -#include <mach/gpmc.h> -#include <mach/gpmc_nand.h> +#include <mach/omap/gpmc.h> +#include <mach/omap/gpmc_nand.h> #include <platform_data/elm.h> #include "nand_omap_bch_decoder.h" diff --git a/drivers/mtd/nand/nand_s3c24xx.c b/drivers/mtd/nand/nand_s3c24xx.c deleted file mode 100644 index 65d9a261c2..0000000000 --- a/drivers/mtd/nand/nand_s3c24xx.c +++ /dev/null @@ -1,649 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* linux/drivers/mtd/nand/s3c2410.c - * - * Copyright (C) 2009 Juergen Beisert, Pengutronix - * - * Copyright © 2004-2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung S3C2410 NAND driver - * - */ - -#include <config.h> -#include <common.h> -#include <driver.h> -#include <malloc.h> -#include <init.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/nand.h> -#include <mach/s3c-generic.h> -#include <mach/s3c-iomap.h> -#include <mach/s3c24xx-nand.h> -#include <io.h> -#include <errno.h> -#include <asm/sections.h> - -#ifdef CONFIG_S3C_NAND_BOOT -# define __nand_boot_init __bare_init -# ifndef BOARD_DEFAULT_NAND_TIMING -# define BOARD_DEFAULT_NAND_TIMING 0x0737 -# endif -#else -# define __nand_boot_init -#endif - -/** - * Define this symbol for testing purpose. It will add a command to read an - * image from the NAND like it the boot strap code will do. - */ -#define CONFIG_NAND_S3C_BOOT_DEBUG - -/* NAND controller's register */ - -#define NFCONF 0x00 - -#ifdef CONFIG_CPU_S3C2410 - -#define NFCMD 0x04 -#define NFADDR 0x08 -#define NFDATA 0x0c -#define NFSTAT 0x10 -#define NFECC 0x14 - -/* S3C2410 specific bits */ -#define NFSTAT_BUSY (1) -#define NFCONF_nFCE (1 << 11) -#define NFCONF_INITECC (1 << 12) -#define NFCONF_EN (1 << 15) - -#endif /* CONFIG_CPU_S3C2410 */ - -#ifdef CONFIG_CPU_S3C2440 - -#define NFCONT 0x04 -#define NFCMD 0x08 -#define NFADDR 0x0C -#define NFDATA 0x10 -#define NFSTAT 0x20 -#define NFECC 0x2C - -/* S3C2440 specific bits */ -#define NFSTAT_BUSY (1) -#define NFCONT_nFCE (1 << 1) -#define NFCONT_INITECC (1 << 4) -#define NFCONT_EN (1) - -#endif /* CONFIG_CPU_S3C2440 */ - - -struct s3c24x0_nand_host { - struct nand_chip nand; - struct mtd_partition *parts; - struct device *dev; - - void __iomem *base; -}; - -/** - * oob placement block for use with hardware ecc generation on small page - */ -static struct nand_ecclayout nand_hw_eccoob = { - .eccbytes = 3, - .eccpos = { 0, 1, 2}, - .oobfree = { - { - .offset = 8, - .length = 8 - } - } -}; - -/* - Functions shared between the boot strap code and the regular driver - */ - -/** - * Issue the specified command to the NAND device - * @param[in] host Base address of the NAND controller - * @param[in] cmd Command for NAND flash - */ -static void __nand_boot_init send_cmd(void __iomem *host, uint8_t cmd) -{ - writeb(cmd, host + NFCMD); -} - -/** - * Issue the specified address to the NAND device - * @param[in] host Base address of the NAND controller - * @param[in] addr Address for the NAND flash - */ -static void __nand_boot_init send_addr(void __iomem *host, uint8_t addr) -{ - writeb(addr, host + NFADDR); -} - -/** - * Enable the NAND flash access - * @param[in] host Base address of the NAND controller - */ -static void __nand_boot_init enable_cs(void __iomem *host) -{ -#ifdef CONFIG_CPU_S3C2410 - writew(readw(host + NFCONF) & ~NFCONF_nFCE, host + NFCONF); -#endif -#ifdef CONFIG_CPU_S3C2440 - writew(readw(host + NFCONT) & ~NFCONT_nFCE, host + NFCONT); -#endif -} - -/** - * Disable the NAND flash access - * @param[in] host Base address of the NAND controller - */ -static void __nand_boot_init disable_cs(void __iomem *host) -{ -#ifdef CONFIG_CPU_S3C2410 - writew(readw(host + NFCONF) | NFCONF_nFCE, host + NFCONF); -#endif -#ifdef CONFIG_CPU_S3C2440 - writew(readw(host + NFCONT) | NFCONT_nFCE, host + NFCONT); -#endif -} - -/** - * Enable the NAND flash controller - * @param[in] host Base address of the NAND controller - * @param[in] timing Timing to access the NAND memory - */ -static void __nand_boot_init enable_nand_controller(void __iomem *host, uint32_t timing) -{ -#ifdef CONFIG_CPU_S3C2410 - writew(timing + NFCONF_EN + NFCONF_nFCE, host + NFCONF); -#endif -#ifdef CONFIG_CPU_S3C2440 - writew(NFCONT_EN + NFCONT_nFCE, host + NFCONT); - writew(timing, host + NFCONF); -#endif -} - -/** - * Diable the NAND flash controller - * @param[in] host Base address of the NAND controller - */ -static void __nand_boot_init disable_nand_controller(void __iomem *host) -{ -#ifdef CONFIG_CPU_S3C2410 - writew(NFCONF_nFCE, host + NFCONF); -#endif -#ifdef CONFIG_CPU_S3C2440 - writew(NFCONT_nFCE, host + NFCONT); -#endif -} - -/* ----------------------------------------------------------------------- */ - -#ifdef CONFIG_CPU_S3C2440 -/** - * Read one block of data from the NAND port - * @param[in] mtd Instance data - * @param[out] buf buffer to write data to - * @param[in] len byte count - * - * This is a special block read variant for the S3C2440 CPU. - */ -static void s3c2440_nand_read_buf(struct nand_chip *chip, uint8_t *buf, int len) -{ - struct s3c24x0_nand_host *host = chip->priv; - - readsl(host->base + NFDATA, buf, len >> 2); - - /* cleanup any fractional read */ - if (len & 3) { - buf += len & ~3; - - for (; len & 3; len--) - *buf++ = readb(host->base + NFDATA); - } -} - -/** - * Write one block of data to the NAND port - * @param[in] mtd Instance data - * @param[out] buf buffer to read data from - * @param[in] len byte count - * - * This is a special block write variant for the S3C2440 CPU. - */ -static void s3c2440_nand_write_buf(struct nand_chip *chip, const uint8_t *buf, - int len) -{ - struct s3c24x0_nand_host *host = chip->priv; - - writesl(host->base + NFDATA, buf, len >> 2); - - /* cleanup any fractional write */ - if (len & 3) { - buf += len & ~3; - - for (; len & 3; len--, buf++) - writeb(*buf, host->base + NFDATA); - } -} -#endif - -/** - * Check the ECC and try to repair the data if possible - * @param[in] mtd_info Not used - * @param[inout] dat Pointer to the data buffer that might contain a bit error - * @param[in] read_ecc ECC data from the OOB space - * @param[in] calc_ecc ECC data calculated from the data - * @return 0 no error, 1 repaired error, -1 no way... - * - * @note: This routine works always on a 24 bit ECC - */ -static int s3c2410_nand_correct_data(struct nand_chip *chip, uint8_t *dat, - uint8_t *read_ecc, uint8_t *calc_ecc) -{ - unsigned int diff0, diff1, diff2; - unsigned int bit, byte; - - diff0 = read_ecc[0] ^ calc_ecc[0]; - diff1 = read_ecc[1] ^ calc_ecc[1]; - diff2 = read_ecc[2] ^ calc_ecc[2]; - - if (diff0 == 0 && diff1 == 0 && diff2 == 0) - return 0; /* ECC is ok */ - - /* sometimes people do not think about using the ECC, so check - * to see if we have an 0xff,0xff,0xff read ECC and then ignore - * the error, on the assumption that this is an un-eccd page. - */ - if (read_ecc[0] == 0xff && read_ecc[1] == 0xff && read_ecc[2] == 0xff) - return 0; - - /* Can we correct this ECC (ie, one row and column change). - * Note, this is similar to the 256 error code on smartmedia */ - - if (((diff0 ^ (diff0 >> 1)) & 0x55) == 0x55 && - ((diff1 ^ (diff1 >> 1)) & 0x55) == 0x55 && - ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) { - /* calculate the bit position of the error */ - - bit = ((diff2 >> 3) & 1) | - ((diff2 >> 4) & 2) | - ((diff2 >> 5) & 4); - - /* calculate the byte position of the error */ - - byte = ((diff2 << 7) & 0x100) | - ((diff1 << 0) & 0x80) | - ((diff1 << 1) & 0x40) | - ((diff1 << 2) & 0x20) | - ((diff1 << 3) & 0x10) | - ((diff0 >> 4) & 0x08) | - ((diff0 >> 3) & 0x04) | - ((diff0 >> 2) & 0x02) | - ((diff0 >> 1) & 0x01); - - dat[byte] ^= (1 << bit); - return 1; - } - - /* if there is only one bit difference in the ECC, then - * one of only a row or column parity has changed, which - * means the error is most probably in the ECC itself */ - - diff0 |= (diff1 << 8); - diff0 |= (diff2 << 16); - - if ((diff0 & ~(1<<fls(diff0))) == 0) - return 1; - - return -1; -} - -static void s3c2410_nand_enable_hwecc(struct nand_chip *chip, int mode) -{ - struct s3c24x0_nand_host *host = chip->priv; - -#ifdef CONFIG_CPU_S3C2410 - writel(readl(host->base + NFCONF) | NFCONF_INITECC , host->base + NFCONF); -#endif -#ifdef CONFIG_CPU_S3C2440 - writel(readl(host->base + NFCONT) | NFCONT_INITECC , host->base + NFCONT); -#endif -} - -static int s3c2410_nand_calculate_ecc(struct nand_chip *chip, const uint8_t *dat, uint8_t *ecc_code) -{ - struct s3c24x0_nand_host *host = chip->priv; - -#ifdef CONFIG_CPU_S3C2410 - ecc_code[0] = readb(host->base + NFECC); - ecc_code[1] = readb(host->base + NFECC + 1); - ecc_code[2] = readb(host->base + NFECC + 2); -#endif -#ifdef CONFIG_CPU_S3C2440 - unsigned long ecc = readl(host->base + NFECC); - - ecc_code[0] = ecc; - ecc_code[1] = ecc >> 8; - ecc_code[2] = ecc >> 16; -#endif - return 0; -} - -static void s3c24x0_nand_select_chip(struct nand_chip *chip, int num) -{ - struct s3c24x0_nand_host *host = chip->priv; - - if (num == -1) - disable_cs(host->base); - else - enable_cs(host->base); -} - -static int s3c24x0_nand_devready(struct nand_chip *chip) -{ - struct s3c24x0_nand_host *host = chip->priv; - - return readw(host->base + NFSTAT) & NFSTAT_BUSY; -} - -static void s3c24x0_nand_hwcontrol(struct nand_chip *chip, int cmd, - unsigned int ctrl) -{ - struct s3c24x0_nand_host *host = chip->priv; - - if (cmd == NAND_CMD_NONE) - return; - /* - * If the CLE should be active, this call is a NAND command - */ - if (ctrl & NAND_CLE) - send_cmd(host->base, cmd); - /* - * If the ALE should be active, this call is a NAND address - */ - if (ctrl & NAND_ALE) - send_addr(host->base, cmd); -} - -static int s3c24x0_nand_inithw(struct s3c24x0_nand_host *host) -{ - struct s3c24x0_nand_platform_data *pdata = host->dev->platform_data; - uint32_t tmp; - - /* reset the NAND controller */ - disable_nand_controller(host->base); - - if (pdata != NULL) - tmp = pdata->nand_timing; - else - /* else slowest possible timing */ - tmp = CALC_NFCONF_TIMING(4, 8, 8); - - /* reenable the NAND controller */ - enable_nand_controller(host->base, tmp); - - return 0; -} - -static int s3c24x0_nand_probe(struct device *dev) -{ - struct resource *iores; - struct nand_chip *chip; - struct s3c24x0_nand_platform_data *pdata = dev->platform_data; - struct mtd_info *mtd; - struct s3c24x0_nand_host *host; - int ret; - - /* Allocate memory for MTD device structure and private data */ - host = kzalloc(sizeof(struct s3c24x0_nand_host), GFP_KERNEL); - if (!host) - return -ENOMEM; - - host->dev = dev; - iores = dev_request_mem_resource(dev, 0); - if (IS_ERR(iores)) - return PTR_ERR(iores); - host->base = IOMEM(iores->start); - - /* structures must be linked */ - chip = &host->nand; - mtd = nand_to_mtd(chip); - mtd->dev.parent = dev; - - /* init the default settings */ - - /* 50 us command delay time */ - chip->legacy.chip_delay = 50; - chip->priv = host; - - chip->legacy.IO_ADDR_R = chip->legacy.IO_ADDR_W = host->base + NFDATA; - -#ifdef CONFIG_CPU_S3C2440 - chip->legacy.read_buf = s3c2440_nand_read_buf; - chip->legacy.write_buf = s3c2440_nand_write_buf; -#endif - chip->legacy.cmd_ctrl = s3c24x0_nand_hwcontrol; - chip->legacy.dev_ready = s3c24x0_nand_devready; - chip->legacy.select_chip = s3c24x0_nand_select_chip; - - /* we are using the hardware ECC feature of this device */ - chip->ecc.calculate = s3c2410_nand_calculate_ecc; - chip->ecc.correct = s3c2410_nand_correct_data; - chip->ecc.hwctl = s3c2410_nand_enable_hwecc; - - /* - * Setup ECC handling in accordance to the kernel - * - 1 times 512 bytes with 24 bit ECC for small page - * - 8 times 256 bytes with 24 bit ECC each for large page - */ - chip->ecc.mode = NAND_ECC_HW; - chip->ecc.bytes = 3; /* always 24 bit ECC per turn */ - chip->ecc.strength = 1; - -#ifdef CONFIG_CPU_S3C2440 - if (readl(host->base) & 0x8) { - /* large page (2048 bytes per page) */ - chip->ecc.size = 256; - } else -#endif - { - /* small page (512 bytes per page) */ - chip->ecc.size = 512; - mtd_set_ecclayout(mtd, &nand_hw_eccoob); - } - - if (pdata->flash_bbt) { - /* use a flash based bbt */ - chip->bbt_options |= NAND_BBT_USE_FLASH; - } - - ret = s3c24x0_nand_inithw(host); - if (ret != 0) - goto on_error; - - /* Scan to find existence of the device */ - ret = nand_scan(chip, 1); - if (ret != 0) { - ret = -ENXIO; - goto on_error; - } - - return add_mtd_nand_device(mtd, "nand"); - -on_error: - free(host); - return ret; -} - -static struct driver s3c24x0_nand_driver = { - .name = "s3c24x0_nand", - .probe = s3c24x0_nand_probe, -}; -device_platform_driver(s3c24x0_nand_driver); - -#ifdef CONFIG_S3C_NAND_BOOT - -static void __nand_boot_init wait_for_completion(void __iomem *host) -{ - while (!(readw(host + NFSTAT) & NFSTAT_BUSY)) - ; -} - -/** - * Convert a page offset into a page address for the NAND - * @param host Where to write the address to - * @param offs Page's offset in the NAND - * @param ps Page size (512 or 2048) - * @param c Address cycle count (3, 4 or 5) - * - * Uses the offset of the page to generate an page address into the NAND. This - * differs when using a 512 byte or 2048 bytes per page NAND. - * The column part of the page address to be generated is always forced to '0'. - */ -static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs, - int ps, int c) -{ - send_addr(host, 0); /* column part 1 */ - - if (ps == 512) { - send_addr(host, offs >> 9); - send_addr(host, offs >> 17); - if (c > 3) - send_addr(host, offs >> 25); - } else { - send_addr(host, 0); /* column part 2 */ - send_addr(host, offs >> 11); - send_addr(host, offs >> 19); - if (c > 4) - send_addr(host, offs >> 27); - send_cmd(host, NAND_CMD_READSTART); - } -} - -/** - * Load a sequential count of pages from the NAND into memory - * @param[out] dest Pointer to target area (in SDRAM) - * @param[in] size Bytes to read from NAND device - * @param[in] page Start page to read from - * - * This function must be located in the first 4kiB of the barebox image - * (guess why). - */ -void __nand_boot_init s3c24x0_nand_load_image(void *dest, int size, int page) -{ - void __iomem *host = (void __iomem *)S3C24X0_NAND_BASE; - unsigned pagesize; - int i, cycle; - - /* - * Reenable the NFC and use the default (but slow) access - * timing or the board specific setting if provided. - */ - enable_nand_controller(host, BOARD_DEFAULT_NAND_TIMING); - - /* use the current NAND hardware configuration */ - switch (readl(S3C24X0_NAND_BASE) & 0xf) { - case 0x6: /* 8 bit, 4 addr cycles, 512 bpp, normal NAND */ - pagesize = 512; - cycle = 4; - break; - case 0xc: /* 8 bit, 4 addr cycles, 2048 bpp, advanced NAND */ - pagesize = 2048; - cycle = 4; - break; - case 0xe: /* 8 bit, 5 addr cycles, 2048 bpp, advanced NAND */ - pagesize = 2048; - cycle = 5; - break; - default: - /* we cannot output an error message here :-( */ - disable_nand_controller(host); - return; - } - - enable_cs(host); - - /* Reset the NAND device */ - send_cmd(host, NAND_CMD_RESET); - wait_for_completion(host); - disable_cs(host); - - do { - enable_cs(host); - send_cmd(host, NAND_CMD_READ0); - nfc_addr(host, page * pagesize, pagesize, cycle); - wait_for_completion(host); - /* copy one page (do *not* use readsb() here!)*/ - for (i = 0; i < pagesize; i++) - writeb(readb(host + NFDATA), (void __iomem *)(dest + i)); - disable_cs(host); - - page++; - dest += pagesize; - size -= pagesize; - } while (size >= 0); - - /* disable the controller again */ - disable_nand_controller(host); -} - -void __nand_boot_init nand_boot(void) -{ - void *dest = _text; - int size = barebox_image_size; - int page = 0; - - s3c24x0_nand_load_image(dest, size, page); -} -#ifdef CONFIG_NAND_S3C_BOOT_DEBUG -#include <command.h> - -static int do_nand_boot_test(int argc, char *argv[]) -{ - void *dest; - int size; - - if (argc < 3) - return COMMAND_ERROR_USAGE; - - dest = (void *)strtoul_suffix(argv[1], NULL, 0); - size = strtoul_suffix(argv[2], NULL, 0); - - s3c24x0_nand_load_image(dest, size, 0); - - /* re-enable the controller again, as this was a test only */ - enable_nand_controller((void *)S3C24X0_NAND_BASE, - BOARD_DEFAULT_NAND_TIMING); - - return 0; -} - -BAREBOX_CMD_START(nand_boot_test) - .cmd = do_nand_boot_test, - BAREBOX_CMD_DESC("load an image from NAND") - BAREBOX_CMD_OPTS("DEST SIZE") - BAREBOX_CMD_GROUP(CMD_GRP_BOOT) -BAREBOX_CMD_END -#endif - -#endif /* CONFIG_S3C_NAND_BOOT */ - -/** - * @file - * @brief Support for various kinds of NAND devices - * - * ECC handling in this driver (in accordance to the current 2.6.38 kernel): - * - for small page NANDs it generates 3 ECC bytes out of 512 data bytes - * - for large page NANDs it generates 24 ECC bytes out of 2048 data bytes - * - * As small page NANDs are using 48 bits ECC per default, this driver uses a - * local OOB layout description, to shrink it down to 24 bits. This is a bad - * idea, but we cannot change it here, as the kernel is using this layout. - * - * For large page NANDs this driver uses the default layout, as the kernel does. - */ diff --git a/drivers/mtd/nand/nomadik_nand.c b/drivers/mtd/nand/nomadik_nand.c index ef8df3ef80..940ed9809e 100644 --- a/drivers/mtd/nand/nomadik_nand.c +++ b/drivers/mtd/nand/nomadik_nand.c @@ -24,8 +24,8 @@ #include <linux/mtd/rawnand.h> #include <io.h> -#include <mach/nand.h> -#include <mach/fsmc.h> +#include <mach/nomadik/nand.h> +#include <mach/nomadik/fsmc.h> #include <errno.h> diff --git a/drivers/net/at91_ether.c b/drivers/net/at91_ether.c index 6cf700ad90..5cebb8b44c 100644 --- a/drivers/net/at91_ether.c +++ b/drivers/net/at91_ether.c @@ -15,9 +15,9 @@ #include <xfuncs.h> #include <init.h> #include <asm/io.h> -#include <mach/hardware.h> -#include <mach/at91rm9200_emac.h> -#include <mach/board.h> +#include <mach/at91/hardware.h> +#include <mach/at91/at91rm9200_emac.h> +#include <mach/at91/board.h> #include <generated/mach-types.h> #include <linux/clk.h> #include <linux/mii.h> diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 82a1fb974e..eacb382afe 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -22,7 +22,7 @@ #include <asm/system.h> #include <linux/err.h> -#include <mach/cpsw.h> +#include <mach/omap/cpsw.h> #define CPSW_VERSION_1 0x19010a #define CPSW_VERSION_2 0x19010c diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 2415aa7443..7f2e1af3f7 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -31,7 +31,7 @@ #include <init.h> #include <asm/system.h> #include <linux/phy.h> -#include <mach/emac_defs.h> +#include <mach/omap/emac_defs.h> #include <of_net.h> #include "davinci_emac.h" diff --git a/drivers/net/ep93xx.c b/drivers/net/ep93xx.c index ee650cdeea..77f8aa63db 100644 --- a/drivers/net/ep93xx.c +++ b/drivers/net/ep93xx.c @@ -21,7 +21,7 @@ #include <malloc.h> #include <io.h> #include <linux/types.h> -#include <mach/ep93xx-regs.h> +#include <mach/ep93xx/ep93xx-regs.h> #include <linux/phy.h> #include <platform_data/eth-ep93xx.h> #include "ep93xx.h" diff --git a/drivers/nvmem/bsec.c b/drivers/nvmem/bsec.c index dfb6ad8bc9..31d9750194 100644 --- a/drivers/nvmem/bsec.c +++ b/drivers/nvmem/bsec.c @@ -14,7 +14,7 @@ #include <io.h> #include <of.h> #include <regmap.h> -#include <mach/bsec.h> +#include <mach/stm32mp/bsec.h> #include <machine_id.h> #include <linux/nvmem-provider.h> diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c index b478ece306..ff1e815c6b 100644 --- a/drivers/nvmem/ocotp.c +++ b/drivers/nvmem/ocotp.c @@ -25,9 +25,14 @@ #include <clock.h> #include <regmap.h> #include <linux/clk.h> -#include <mach/ocotp.h> #include <machine_id.h> +#ifdef CONFIG_ARCH_IMX +#include <mach/imx/ocotp.h> +#include <mach/imx/ocotp-fusemap.h> +#else +#include <mach/ocotp.h> #include <mach/ocotp-fusemap.h> +#endif #include <soc/imx8m/featctrl.h> #include <linux/nvmem-provider.h> diff --git a/drivers/of/base.c b/drivers/of/base.c index fb23594c7a..ea4be9c512 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2513,13 +2513,13 @@ static int of_probe_memory(void) } mem_initcall(of_probe_memory); -static void of_platform_device_create_root(struct device_node *np) +struct device *of_platform_device_create_root(struct device_node *np) { static struct device *dev; int ret; if (dev) - return; + return dev; dev = xzalloc(sizeof(*dev)); dev->id = DEVICE_ID_SINGLE; @@ -2527,8 +2527,12 @@ static void of_platform_device_create_root(struct device_node *np) dev_set_name(dev, "machine"); ret = platform_device_register(dev); - if (ret) + if (ret) { free_device(dev); + return ERR_PTR(ret); + } + + return dev; } static const struct of_device_id reserved_mem_matches[] = { @@ -2617,19 +2621,26 @@ out: return dn; } -struct device_node *of_copy_node(struct device_node *parent, const struct device_node *other) +void of_merge_nodes(struct device_node *np, const struct device_node *other) { - struct device_node *np, *child; + struct device_node *child; struct property *pp; - np = of_new_node(parent, other->name); - np->phandle = other->phandle; - list_for_each_entry(pp, &other->properties, list) of_new_property(np, pp->name, pp->value, pp->length); for_each_child_of_node(other, child) of_copy_node(np, child); +} + +struct device_node *of_copy_node(struct device_node *parent, const struct device_node *other) +{ + struct device_node *np; + + np = of_new_node(parent, other->name); + np->phandle = other->phandle; + + of_merge_nodes(np, other); return np; } diff --git a/drivers/of/platform.c b/drivers/of/platform.c index edb082b106..0982873446 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -418,7 +418,7 @@ static struct device *of_device_create_on_demand(struct device_node *np) parent = of_get_parent(np); if (!parent) - return NULL; + return of_platform_device_create_root(np); if (!np->dev && parent->dev) { ret = device_detect(parent->dev); diff --git a/drivers/pci/pci-tegra.c b/drivers/pci/pci-tegra.c index 06a5bd9d82..afff5f6138 100644 --- a/drivers/pci/pci-tegra.c +++ b/drivers/pci/pci-tegra.c @@ -22,7 +22,7 @@ #include <linux/phy/phy.h> #include <linux/reset.h> #include <linux/sizes.h> -#include <mach/tegra-powergate.h> +#include <mach/tegra/tegra-powergate.h> #include <regulator.h> /* register definitions */ diff --git a/drivers/pinctrl/imx-iomux-v1.c b/drivers/pinctrl/imx-iomux-v1.c index ccbacebab9..6fe0286a6a 100644 --- a/drivers/pinctrl/imx-iomux-v1.c +++ b/drivers/pinctrl/imx-iomux-v1.c @@ -4,7 +4,7 @@ #include <init.h> #include <malloc.h> #include <pinctrl.h> -#include <mach/iomux-v1.h> +#include <mach/imx/iomux-v1.h> #include <linux/err.h> /* diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c index aacab2ad51..7952c65a50 100644 --- a/drivers/pinctrl/imx-iomux-v3.c +++ b/drivers/pinctrl/imx-iomux-v3.c @@ -11,8 +11,8 @@ #include <of.h> #include <pinctrl.h> #include <malloc.h> -#include <mach/iomux-v3.h> -#include <mach/generic.h> +#include <mach/imx/iomux-v3.h> +#include <mach/imx/generic.h> struct imx_iomux_v3 { void __iomem *base; diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index 7f507bedb4..c9203d6049 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -11,7 +11,7 @@ #include <pinctrl.h> #include <malloc.h> #include <gpio.h> -#include <mach/gpio.h> +#include <mach/at91/gpio.h> #include <linux/clk.h> #include <dt-bindings/pinctrl/at91.h> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index b80fa85f82..93a7ad0a65 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -18,9 +18,9 @@ #include <getopt.h> #include <deep-probe.h> -#include <mach/at91_pio.h> -#include <mach/gpio.h> -#include <mach/iomux.h> +#include <mach/at91/at91_pio.h> +#include <mach/at91/gpio.h> +#include <mach/at91/iomux.h> #include <pinctrl.h> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index ed53630fe0..df5f22a7c5 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -525,7 +525,7 @@ static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, { struct rockchip_pinctrl *info = bank->drvdata; struct rockchip_pin_ctrl *ctrl = info->ctrl; - struct rockchip_mux_route_data *data; + struct rockchip_mux_route_data *data = NULL; int i; for (i = 0; i < ctrl->niomux_routes; i++) { diff --git a/drivers/pinctrl/pinctrl-vf610.c b/drivers/pinctrl/pinctrl-vf610.c index 73194e9efa..9f150cd89d 100644 --- a/drivers/pinctrl/pinctrl-vf610.c +++ b/drivers/pinctrl/pinctrl-vf610.c @@ -12,7 +12,7 @@ #include <malloc.h> #include <gpio.h> -#include <mach/iomux-vf610.h> +#include <mach/imx/iomux-vf610.h> enum { PINCTRL_VF610_MUX_LINE_SIZE = 20, diff --git a/drivers/pwm/pxa_pwm.c b/drivers/pwm/pxa_pwm.c index 305dc06bdd..0ed69d999f 100644 --- a/drivers/pwm/pxa_pwm.c +++ b/drivers/pwm/pxa_pwm.c @@ -13,10 +13,10 @@ #include <io.h> #include <pwm.h> -#include <mach/hardware.h> -#include <mach/clock.h> -#include <mach/pxa-regs.h> -#include <mach/regs-pwm.h> +#include <mach/pxa/hardware.h> +#include <mach/pxa/clock.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/regs-pwm.h> #include <linux/math64.h> #include <linux/compiler.h> diff --git a/drivers/regulator/bcm2835.c b/drivers/regulator/bcm2835.c index 61dc7cda1f..34e0429dfd 100644 --- a/drivers/regulator/bcm2835.c +++ b/drivers/regulator/bcm2835.c @@ -9,7 +9,7 @@ #include <init.h> #include <regulator.h> -#include <mach/mbox.h> +#include <mach/bcm283x/mbox.h> #define REG_DEV(_id, _name) \ { \ diff --git a/drivers/regulator/pfuze.c b/drivers/regulator/pfuze.c index 51a2ca1245..8945ee7c15 100644 --- a/drivers/regulator/pfuze.c +++ b/drivers/regulator/pfuze.c @@ -16,7 +16,6 @@ #include <i2c/i2c.h> #include <poweroff.h> -#include <mach/imx6.h> #define DRIVERNAME "pfuze" diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c index afd78026f5..d81bcabace 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -10,7 +10,7 @@ #include <driver.h> #include <init.h> #include <io.h> -#include <mach/smc.h> +#include <mach/stm32mp/smc.h> #include <mfd/syscon.h> #include <of_address.h> #include <regmap.h> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 6fda32d44c..7c9a46845a 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -107,24 +107,6 @@ config DRIVER_SERIAL_PL010 help Enable this to get support for AMBA PL010 based serial devices -config DRIVER_SERIAL_S3C_IMPROVED - bool - -config DRIVER_SERIAL_S3C - bool "Samsung S3C serial driver" - depends on ARCH_SAMSUNG - select DRIVER_SERIAL_S3C_IMPROVED if (CPU_S5PC110 || CPU_S5PV210 || CPU_S3C6410) - default y - help - Say Y here if you want to use the CONS on a Samsung S3C CPU - -config DRIVER_SERIAL_S3C_AUTOSYNC - bool "Enable auto flow" - depends on DRIVER_SERIAL_S3C - help - Say Y here if you want to use the auto flow feature of this - UART. RTS and CTS will be handled by the hardware when enabled. - config DRIVER_SERIAL_PXA bool "PXA serial driver" depends on ARCH_PXA diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 4b2bfb0537..5677dba631 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_DRIVER_SERIAL_CLPS711X) += serial_clps711x.o obj-$(CONFIG_DRIVER_SERIAL_NS16550) += serial_ns16550.o obj-$(CONFIG_DRIVER_SERIAL_NS16550_PCI) += serial_ns16550_pci.o obj-$(CONFIG_DRIVER_SERIAL_PL010) += serial_pl010.o -obj-$(CONFIG_DRIVER_SERIAL_S3C) += serial_s3c.o obj-$(CONFIG_DRIVER_SERIAL_STM32) += serial_stm32.o obj-$(CONFIG_DRIVER_SERIAL_ALTERA) += serial_altera.o obj-$(CONFIG_DRIVER_SERIAL_ALTERA_JTAG) += serial_altera_jtag.o diff --git a/drivers/serial/serial_auart.c b/drivers/serial/serial_auart.c index a0163bef6f..2ac7349c66 100644 --- a/drivers/serial/serial_auart.c +++ b/drivers/serial/serial_auart.c @@ -36,8 +36,6 @@ #include <linux/clk.h> #include <linux/err.h> -#include <mach/clock.h> - #define HW_UARTAPP_CTRL0 (0x00000000) #define HW_UARTAPP_CTRL2 (0x00000020) diff --git a/drivers/serial/serial_digic.c b/drivers/serial/serial_digic.c index 31880ca996..61ba7d06f3 100644 --- a/drivers/serial/serial_digic.c +++ b/drivers/serial/serial_digic.c @@ -10,7 +10,7 @@ #include <malloc.h> #include <io.h> -#include <mach/uart.h> +#include <mach/digic/uart.h> /* * This driver is based on the "Serial terminal" docs here: diff --git a/drivers/serial/serial_omap4_usbboot.c b/drivers/serial/serial_omap4_usbboot.c index ea018444d5..709398966f 100644 --- a/drivers/serial/serial_omap4_usbboot.c +++ b/drivers/serial/serial_omap4_usbboot.c @@ -4,7 +4,7 @@ #include <init.h> #include <malloc.h> #include <errno.h> -#include <mach/omap4_rom_usb.h> +#include <mach/omap/omap4_rom_usb.h> struct serial_omap4_usbboot_priv { struct console_device cdev; @@ -49,6 +49,12 @@ static int serial_omap4_usbboot_getc(struct console_device *cdev) static int serial_omap4_usbboot_probe(struct device *dev) { struct serial_omap4_usbboot_priv *priv; + int ret; + + ret = omap4_usbboot_open(); + if (ret) + return ret; + priv = xzalloc(sizeof(*priv)); priv->cdev.dev = dev; diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c index 9a591a0be8..97342f923e 100644 --- a/drivers/serial/serial_pxa.c +++ b/drivers/serial/serial_pxa.c @@ -9,7 +9,7 @@ #include <init.h> #include <malloc.h> -#include <mach/clock.h> +#include <mach/pxa/clock.h> #include <asm/io.h> #define RBR 0x00 /* Receive Buffer Register (read only) */ diff --git a/drivers/serial/serial_s3c.c b/drivers/serial/serial_s3c.c deleted file mode 100644 index 5f6f2082eb..0000000000 --- a/drivers/serial/serial_s3c.c +++ /dev/null @@ -1,198 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (c) 2009...2011 Juergen Beisert <j.beisert@pengutronix.de> - * - * Based on code from: - * (c) 2004 Sascha Hauer <sascha@saschahauer.de> - */ - -#include <common.h> -#include <driver.h> -#include <init.h> -#include <malloc.h> -#include <io.h> -#include <mach/s3c-generic.h> -#include <mach/s3c-iomap.h> - -/* Note: Offsets are for little endian access */ -#define ULCON 0x00 /* line control */ -#define UCON 0x04 /* UART control */ -# define UCON_SET_CLK_SRC(x) (((x) & 0x03) << 10) -# define UCON_GET_CLK_SRC(x) (((x) >> 10) & 0x03) -#define UFCON 0x08 /* FIFO control */ -#define UMCON 0x0c /* modem control */ -#define UTRSTAT 0x10 /* Rx/Tx status */ -#define UERSTAT 0x14 /* error status */ -#define UFSTAT 0x18 /* FIFO status */ -#define UMSTAT 0x1c /* modem status */ -#define UTXH 0x20 /* transmitt */ -#define URXH 0x24 /* receive */ -#define UBRDIV 0x28 /* baudrate generator */ -#define UBRDIVSLOT 0x2c /* baudrate slot generator */ -#define UINTM 0x38 /* interrupt mask register */ - -struct s3c_uart { - void __iomem *regs; - struct console_device cdev; -}; - -#define to_s3c_uart(c) container_of(c, struct s3c_uart, cdev) - -/* each architecture has a preferred reference clock for its UARTs */ -static unsigned s3c_select_arch_input_clock(void) -{ - /* S3C24xx: 0=2=PCLK, 1=UEXTCLK, 3=FCLK/n */ - if (IS_ENABLED(CONFIG_ARCH_S3C24xx)) - return 0; /* use the internal PCLK */ - /* S3C64xx: 0=2=PCLK, 1=UCLK0, 3=UCLK1 */ - if (IS_ENABLED(CONFIG_ARCH_S3C64xx)) - return 3; /* use the internal UCLK1 */ - /* S5PCxx: 0=PCLK, 1=SCLK_UART */ - if (IS_ENABLED(CONFIG_ARCH_S5PCxx)) - return 0; /* use the internal PCLK */ -} - -static unsigned s3c_get_arch_uart_input_clock(void __iomem *base) -{ - unsigned reg = readw(base + UCON); - return s3c_get_uart_clk(UCON_GET_CLK_SRC(reg)); -} - -/* - * This table takes the fractional value of the baud divisor and gives - * the recommended setting for the UDIVSLOT register. Refer the datasheet - * for further details - */ -static const uint16_t udivslot_table[] __maybe_unused = { - 0x0000, 0x0080, 0x0808, 0x0888, 0x2222, 0x4924, 0x4A52, 0x54AA, - 0x5555, 0xD555, 0xD5D5, 0xDDD5, 0xDDDD, 0xDFDD, 0xDFDF, 0xFFDF, -}; - -static int s3c_serial_setbaudrate(struct console_device *cdev, int baudrate) -{ - struct s3c_uart *priv = to_s3c_uart(cdev); - void __iomem *base = priv->regs; - unsigned val; - - if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_IMPROVED)) { - val = s3c_get_arch_uart_input_clock(base) / baudrate; - writew(udivslot_table[val & 15], base + UBRDIVSLOT); - } - - val = s3c_get_arch_uart_input_clock(base) / (16 * baudrate) - 1; - writew(val, base + UBRDIV); - - return 0; -} - -static int s3c_serial_init_port(struct console_device *cdev) -{ - struct s3c_uart *priv = to_s3c_uart(cdev); - void __iomem *base = priv->regs; - - /* FIFO enable, Tx/Rx FIFO clear */ - writeb(0x07, base + UFCON); - writeb(0x00, base + UMCON); - - /* Normal,No parity,1 stop,8 bit */ - writeb(0x03, base + ULCON); - - /* - * S3C2440 SoC: - * - no clock divider - * all SoCs: - * - enable receive and transmit mode - */ - writew(0x0005 | UCON_SET_CLK_SRC(s3c_select_arch_input_clock()), - base + UCON); - - if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_IMPROVED)) - /* 'interrupt or polling mode' for both directions */ - writeb(0xf, base + UINTM); - - if (IS_ENABLED(CONFIG_DRIVER_SERIAL_S3C_AUTOSYNC)) - writeb(0x10, base + UMCON); /* enable auto flow control */ - else - writeb(0x01, base + UMCON); /* RTS up */ - - return 0; -} - -static void s3c_serial_putc(struct console_device *cdev, char c) -{ - struct s3c_uart *priv = to_s3c_uart(cdev); - void __iomem *base = priv->regs; - - /* Wait for Tx FIFO not full */ - while (!(readb(base + UTRSTAT) & 0x2)) - ; - - writeb(c, base + UTXH); -} - -static int s3c_serial_tstc(struct console_device *cdev) -{ - struct s3c_uart *priv = to_s3c_uart(cdev); - void __iomem *base = priv->regs; - - /* If receive fifo is empty, return false */ - if (readb(base + UTRSTAT) & 0x1) - return 1; - - return 0; -} - -static int s3c_serial_getc(struct console_device *cdev) -{ - struct s3c_uart *priv = to_s3c_uart(cdev); - void __iomem *base = priv->regs; - - /* wait for a character */ - while (!(readb(base + UTRSTAT) & 0x1)) - ; - - return readb(base + URXH); -} - -static void s3c_serial_flush(struct console_device *cdev) -{ - struct s3c_uart *priv = to_s3c_uart(cdev); - void __iomem *base = priv->regs; - - while (!(readb(base + UTRSTAT) & 0x4)) - ; -} - -static int s3c_serial_probe(struct device *dev) -{ - struct resource *iores; - struct s3c_uart *priv; - struct console_device *cdev; - - priv = xzalloc(sizeof(struct s3c_uart)); - cdev = &priv->cdev; - iores = dev_request_mem_resource(dev, 0); - if (IS_ERR(iores)) - return PTR_ERR(iores); - priv->regs = IOMEM(iores->start); - dev->priv = priv; - cdev->dev = dev; - cdev->tstc = s3c_serial_tstc; - cdev->putc = s3c_serial_putc; - cdev->getc = s3c_serial_getc; - cdev->flush = s3c_serial_flush; - cdev->setbrg = s3c_serial_setbaudrate; - - s3c_serial_init_port(cdev); - - /* Enable UART */ - console_register(cdev); - - return 0; -} - -static struct driver s3c_serial_driver = { - .name = "s3c_serial", - .probe = s3c_serial_probe, -}; -console_platform_driver(s3c_serial_driver); diff --git a/drivers/serial/stm-serial.c b/drivers/serial/stm-serial.c index bddb422ac5..e7c04654d2 100644 --- a/drivers/serial/stm-serial.c +++ b/drivers/serial/stm-serial.c @@ -20,7 +20,6 @@ #include <malloc.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/clock.h> #define UARTDBGDR 0x00 #define UARTDBGFR 0x18 diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index 9bf85874c5..166531feb8 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -21,9 +21,9 @@ #include <of_gpio.h> #include <io.h> #include <spi/spi.h> -#include <mach/iomux.h> -#include <mach/board.h> -#include <mach/cpu.h> +#include <mach/at91/iomux.h> +#include <mach/at91/board.h> +#include <mach/at91/cpu.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/spi/dspi_spi.c b/drivers/spi/dspi_spi.c index 5ad9bd0179..8d6687cda4 100644 --- a/drivers/spi/dspi_spi.c +++ b/drivers/spi/dspi_spi.c @@ -21,8 +21,8 @@ #include <gpio.h> #include <of_gpio.h> #include <of_device.h> -#include <mach/spi.h> -#include <mach/generic.h> +#include <mach/imx/spi.h> +#include <mach/imx/generic.h> #include <linux/clk.h> #include <linux/err.h> #include <clock.h> diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c index f81d9e851f..f45b429699 100644 --- a/drivers/spi/imx_spi.c +++ b/drivers/spi/imx_spi.c @@ -15,8 +15,8 @@ #include <malloc.h> #include <gpio.h> #include <of_gpio.h> -#include <mach/spi.h> -#include <mach/generic.h> +#include <mach/imx/spi.h> +#include <mach/imx/generic.h> #include <linux/clk.h> #include <linux/err.h> #include <clock.h> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index c44f551408..d2ec42f064 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -18,9 +18,8 @@ #include <stmp-device.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/generic.h> -#include <mach/clock.h> -#include <mach/ssp.h> +#include <mach/mxs/generic.h> +#include <mach/mxs/ssp.h> #define MXS_SPI_MAX_TIMEOUT (10 * MSECOND) diff --git a/drivers/tee/optee/of.c b/drivers/tee/optee/of.c new file mode 100644 index 0000000000..8295a1751c --- /dev/null +++ b/drivers/tee/optee/of.c @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <of.h> +#include <linux/ioport.h> +#include <asm/barebox-arm.h> +#include <asm/optee.h> + +int of_optee_fixup(struct device_node *root, void *_data) +{ + struct of_optee_fixup_data *fixup_data = _data; + struct resource res = {}; + struct device_node *node; + int ret; + + node = of_create_node(root, "/firmware/optee"); + if (!node) + return -ENOMEM; + + ret = of_property_write_string(node, "compatible", "linaro,optee-tz"); + if (ret) + return ret; + + ret = of_property_write_string(node, "method", fixup_data->method); + if (ret) + return ret; + + res.start = arm_mem_endmem_get() - OPTEE_SIZE; + res.end = arm_mem_endmem_get() - fixup_data->shm_size -1; + res.flags = IORESOURCE_BUSY; + res.name = "optee_core"; + + ret = of_fixup_reserved_memory(root, &res); + if (ret) + return ret; + + res.start = arm_mem_endmem_get() - fixup_data->shm_size; + res.end = arm_mem_endmem_get() - 1; + res.flags &= ~IORESOURCE_BUSY; + res.name = "optee_shm"; + + return of_fixup_reserved_memory(root, &res); +} diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 9a1a376a7a..fc5f24021d 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -26,11 +26,11 @@ #include <asm/byteorder.h> -#include <mach/hardware.h> -#include <mach/at91sam9261.h> -#include <mach/board.h> -#include <mach/cpu.h> -#include <mach/at91sam9261_matrix.h> +#include <mach/at91/hardware.h> +#include <mach/at91/at91sam9261.h> +#include <mach/at91/board.h> +#include <mach/at91/cpu.h> +#include <mach/at91/at91sam9261_matrix.h> #include "at91_udc.h" diff --git a/drivers/usb/gadget/fsl_udc_pbl.c b/drivers/usb/gadget/fsl_udc_pbl.c index d2f2b9e195..218d61db3c 100644 --- a/drivers/usb/gadget/fsl_udc_pbl.c +++ b/drivers/usb/gadget/fsl_udc_pbl.c @@ -3,9 +3,9 @@ #include <common.h> #include <usb/ch9.h> #include <soc/fsl/fsl_udc.h> -#include <mach/imx8mm-regs.h> -#include <mach/imx6-regs.h> -#include <mach/imx7-regs.h> +#include <mach/imx/imx8mm-regs.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx7-regs.h> static void fsl_queue_td(struct usb_dr_device *dr, struct ep_td_struct *dtd, int ep_is_in) diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c index bae0a40642..e5e2ca2b7c 100644 --- a/drivers/usb/gadget/pxa27x_udc.c +++ b/drivers/usb/gadget/pxa27x_udc.c @@ -18,8 +18,8 @@ #include <usb/gadget.h> #include "pxa27x_udc.h" -#include <mach/udc_pxa2xx.h> -#include <mach/pxa-regs.h> +#include <mach/pxa/udc_pxa2xx.h> +#include <mach/pxa/pxa-regs.h> #define DRIVER_VERSION "2008-04-18" #define DRIVER_DESC "PXA 27x USB Device Controller driver" diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 858dc55f32..dd18c4af39 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -11,15 +11,15 @@ #include <mfd/twl4030.h> #include <usb/twl4030.h> -#include <mach/ehci.h> +#include <mach/omap/ehci.h> #include <common.h> #include <io.h> #include <clock.h> #include <gpio.h> -#include <mach/omap3-silicon.h> -#include <mach/omap3-clock.h> -#include <mach/cm-regbits-34xx.h> -#include <mach/sys_info.h> +#include <mach/omap/omap3-silicon.h> +#include <mach/omap/omap3-clock.h> +#include <mach/omap/cm-regbits-34xx.h> +#include <mach/omap/sys_info.h> void omap_usb_utmi_init(struct omap_hcd *omap, u8 tll_channel_mask) { diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 0738c03890..b1416a20d3 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -14,7 +14,7 @@ #include <of_gpio.h> #include <io.h> -#include <mach/board.h> +#include <mach/at91/board.h> #include "ohci.h" diff --git a/drivers/usb/imx/imx-usb-misc.c b/drivers/usb/imx/imx-usb-misc.c index ec3ad81cdd..bd91ac2e57 100644 --- a/drivers/usb/imx/imx-usb-misc.c +++ b/drivers/usb/imx/imx-usb-misc.c @@ -10,8 +10,8 @@ #include <of.h> #include <errno.h> #include <usb/chipidea-imx.h> -#include <mach/imx6-regs.h> -#include <mach/iomux-mx6.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/iomux-mx6.h> #define MX25_OTG_SIC_SHIFT 29 #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 01bdaf47bf..f20cc0befc 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -67,12 +67,6 @@ config DRIVER_VIDEO_STM32_LTDC Say 'Y' here to enable framebuffer and splash screen support for STM32 and STM32MP1. -config DRIVER_VIDEO_S3C24XX - bool "S3C244x framebuffer driver" - depends on ARCH_S3C24xx - help - Add support for the S3C244x LCD controller. - config DRIVER_VIDEO_OMAP bool "OMAP framebuffer driver" depends on ARCH_OMAP4 || COMPILE_TEST @@ -81,13 +75,6 @@ config DRIVER_VIDEO_OMAP driver only supports OMAP4 SoCs in DISPC parallel mode on LCD2 (MIPI DPI). -if DRIVER_VIDEO_S3C24XX - -config DRIVER_VIDEO_S3C_VERBOSE - bool "S3C244x verbose framebuffer info" - -endif - config DRIVER_VIDEO_SDL bool "SDL framebuffer driver" depends on SANDBOX diff --git a/drivers/video/Makefile b/drivers/video/Makefile index d50d2d3ba5..1b6d2986d7 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -18,7 +18,6 @@ obj-$(CONFIG_DRIVER_VIDEO_STM) += stm.o obj-$(CONFIG_DRIVER_VIDEO_STM32_LTDC) += stm32_ltdc.o obj-$(CONFIG_DRIVER_VIDEO_IMX) += imx.o obj-$(CONFIG_DRIVER_VIDEO_IMX_IPU) += imx-ipu-fb.o -obj-$(CONFIG_DRIVER_VIDEO_S3C24XX) += s3c24xx.o obj-$(CONFIG_DRIVER_VIDEO_PXA) += pxa.o obj-$(CONFIG_DRIVER_VIDEO_SDL) += sdl.o obj-$(CONFIG_DRIVER_VIDEO_OMAP) += omap.o diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c index 9817c33ae5..0a24493907 100644 --- a/drivers/video/atmel_hlcdfb.c +++ b/drivers/video/atmel_hlcdfb.c @@ -9,9 +9,9 @@ #include <io.h> #include <init.h> #include <linux/clk.h> -#include <mach/hardware.h> -#include <mach/atmel_hlcdc.h> -#include <mach/cpu.h> +#include <mach/at91/hardware.h> +#include <mach/at91/atmel_hlcdc.h> +#include <mach/at91/cpu.h> #include <errno.h> #include "atmel_lcdfb.h" diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 8c056a8ffb..2d95a37722 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -8,7 +8,7 @@ #include <common.h> #include <io.h> #include <init.h> -#include <mach/hardware.h> +#include <mach/at91/hardware.h> #include <errno.h> #include <linux/clk.h> diff --git a/drivers/video/atmel_lcdfb_core.c b/drivers/video/atmel_lcdfb_core.c index 158fe8bbf9..9d3e6682b6 100644 --- a/drivers/video/atmel_lcdfb_core.c +++ b/drivers/video/atmel_lcdfb_core.c @@ -14,7 +14,7 @@ #include <linux/clk.h> #include <malloc.h> -#include <mach/cpu.h> +#include <mach/at91/cpu.h> #include "atmel_lcdfb.h" diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c index 43593785f3..070d1b4902 100644 --- a/drivers/video/bcm2835.c +++ b/drivers/video/bcm2835.c @@ -15,7 +15,7 @@ #include <xfuncs.h> #include <of_address.h> -#include <mach/mbox.h> +#include <mach/bcm283x/mbox.h> struct bcm2835fb_info { struct fb_info fbi; diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c index cca11dcd84..77c0ba2c9c 100644 --- a/drivers/video/imx-ipu-fb.c +++ b/drivers/video/imx-ipu-fb.c @@ -10,7 +10,7 @@ #include <io.h> #include <mach/imx35-regs.h> #include <fb.h> -#include <mach/imxfb.h> +#include <platform_data/imxfb.h> #include <malloc.h> #include <errno.h> #include <linux/math64.h> diff --git a/drivers/video/imx-ipu-v3/imx-hdmi.c b/drivers/video/imx-ipu-v3/imx-hdmi.c index 84b5d92fa6..06fa929352 100644 --- a/drivers/video/imx-ipu-v3/imx-hdmi.c +++ b/drivers/video/imx-ipu-v3/imx-hdmi.c @@ -18,8 +18,8 @@ #include <i2c/i2c.h> #include <video/media-bus-format.h> #include <video/vpl.h> -#include <mach/imx6-regs.h> -#include <mach/imx53-regs.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx53-regs.h> #include "imx-ipu-v3.h" #include "ipuv3-plane.h" diff --git a/drivers/video/imx-ipu-v3/imx-ldb.c b/drivers/video/imx-ipu-v3/imx-ldb.c index 36e7f7a80a..4a24a3479a 100644 --- a/drivers/video/imx-ipu-v3/imx-ldb.c +++ b/drivers/video/imx-ipu-v3/imx-ldb.c @@ -19,8 +19,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/math64.h> -#include <mach/imx6-regs.h> -#include <mach/imx53-regs.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx53-regs.h> #include "imx-ipu-v3.h" #include "ipuv3-plane.h" diff --git a/drivers/video/imx-ipu-v3/ipu-common.c b/drivers/video/imx-ipu-v3/ipu-common.c index 4da027c584..576387dab3 100644 --- a/drivers/video/imx-ipu-v3/ipu-common.c +++ b/drivers/video/imx-ipu-v3/ipu-common.c @@ -11,10 +11,10 @@ #include <driver.h> #include <init.h> #include <linux/mutex.h> -#include <mach/generic.h> -#include <mach/imx6-regs.h> -#include <mach/imx53-regs.h> -#include <mach/imx51-regs.h> +#include <mach/imx/generic.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx53-regs.h> +#include <mach/imx/imx51-regs.h> #include "imx-ipu-v3.h" #include "ipu-prv.h" diff --git a/drivers/video/imx.c b/drivers/video/imx.c index 5bf5345619..cb1c11b4cb 100644 --- a/drivers/video/imx.c +++ b/drivers/video/imx.c @@ -14,7 +14,7 @@ #include <common.h> #include <fb.h> #include <io.h> -#include <mach/imxfb.h> +#include <platform_data/imxfb.h> #include <driver.h> #include <malloc.h> #include <errno.h> diff --git a/drivers/video/pxa.c b/drivers/video/pxa.c index 99aa435bbe..561a73fb32 100644 --- a/drivers/video/pxa.c +++ b/drivers/video/pxa.c @@ -23,10 +23,10 @@ #include <malloc.h> #include <linux/err.h> -#include <mach/clock.h> -#include <mach/pxa-regs.h> -#include <mach/regs-lcd.h> -#include <mach/pxafb.h> +#include <mach/pxa/clock.h> +#include <mach/pxa/pxa-regs.h> +#include <mach/pxa/regs-lcd.h> +#include <mach/pxa/pxafb.h> #include <asm/io.h> #include <linux/math64.h> diff --git a/drivers/video/s3c24xx.c b/drivers/video/s3c24xx.c deleted file mode 100644 index 8fd56bbc7b..0000000000 --- a/drivers/video/s3c24xx.c +++ /dev/null @@ -1,411 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2010 Juergen Beisert - * Copyright (C) 2011 Alexey Galakhov - * - * This driver is based on a patch found in the web: - * (C) Copyright 2006 by OpenMoko, Inc. - * Author: Harald Welte <laforge at openmoko.org> - */ - -#include <common.h> -#include <init.h> -#include <fb.h> -#include <driver.h> -#include <malloc.h> -#include <errno.h> -#include <io.h> -#include <mach/s3c-generic.h> -#include <mach/s3c24xx-fb.h> - -#define LCDCON1 0x00 -# define PNRMODE(x) (((x) & 3) << 5) -# define BPPMODE(x) (((x) & 0xf) << 1) -# define SET_CLKVAL(x) (((x) & 0x3ff) << 8) -# define GET_CLKVAL(x) (((x) >> 8) & 0x3ff) -# define ENVID (1 << 0) - -#define LCDCON2 0x04 -# define SET_VBPD(x) (((x) & 0xff) << 24) -# define SET_LINEVAL(x) (((x) & 0x3ff) << 14) -# define SET_VFPD(x) (((x) & 0xff) << 6) -# define SET_VSPW(x) ((x) & 0x3f) - -#define LCDCON3 0x08 -# define SET_HBPD(x) (((x) & 0x7f) << 19) -# define SET_HOZVAL(x) (((x) & 0x7ff) << 8) -# define SET_HFPD(x) ((x) & 0xff) - -#define LCDCON4 0x0c -# define SET_HSPW(x) ((x) & 0xff) - -#define LCDCON5 0x10 -# define BPP24BL (1 << 12) -# define FRM565 (1 << 11) -# define INV_CLK (1 << 10) -# define INV_HS (1 << 9) -# define INV_VS (1 << 8) -# define INV_DTA (1 << 7) -# define INV_DE (1 << 6) -# define INV_PWREN (1 << 5) -# define INV_LEND (1 << 4) -# define ENA_PWREN (1 << 3) -# define ENA_LEND (1 << 2) -# define BSWP (1 << 1) -# define HWSWP (1 << 0) - -#define LCDSADDR1 0x14 -# define SET_LCDBANK(x) (((x) & 0x1ff) << 21) -# define GET_LCDBANK(x) (((x) >> 21) & 0x1ff) -# define SET_LCDBASEU(x) ((x) & 0x1fffff) -# define GET_LCDBASEU(x) ((x) & 0x1fffff) - -#define LCDSADDR2 0x18 -# define SET_LCDBASEL(x) ((x) & 0x1fffff) -# define GET_LCDBASEL(x) ((x) & 0x1fffff) - -#define LCDSADDR3 0x1c -# define SET_OFFSIZE(x) (((x) & 0x7ff) << 11) -# define GET_OFFSIZE(x) (((x) >> 11) & 0x7ff) -# define SET_PAGE_WIDTH(x) ((x) & 0x3ff) -# define GET_PAGE_WIDTH(x) ((x) & 0x3ff) - -#define RED_LUT 0x20 -#define GREEN_LUT 0x24 -#define BLUE_LUT 0x28 - -#define DITHMODE 0x4c - -#define TPAL 0x50 - -#define LCDINTPND 0x54 -#define LCDSRCPND 0x58 -#define LCDINTMSK 0x5c -# define FIWSEL (1 << 2) -# define INT_FrSyn (1 << 1) -# define INT_FiCnt (1 << 0) - -#define TCONSEL 0x60 - -#define RED 0 -#define GREEN 1 -#define BLUE 2 -#define TRANSP 3 - -struct s3cfb_info { - void __iomem *base; - unsigned memory_size; - struct fb_info info; - struct device *hw_dev; - int passive_display; - void (*enable)(int enable); -}; - -/* the RGB565 true colour mode */ -static const struct fb_bitfield def_rgb565[] = { - [RED] = { - .offset = 11, - .length = 5, - }, - [GREEN] = { - .offset = 5, - .length = 6, - }, - [BLUE] = { - .offset = 0, - .length = 5, - }, - [TRANSP] = { /* no support for transparency */ - .length = 0, - } -}; - -/* the RGB888 true colour mode */ -static const struct fb_bitfield def_rgb888[] = { - [RED] = { - .offset = 16, - .length = 8, - }, - [GREEN] = { - .offset = 8, - .length = 8, - }, - [BLUE] = { - .offset = 0, - .length = 8, - }, - [TRANSP] = { /* no support for transparency */ - .length = 0, - } -}; - -/** - * @param fb_info Framebuffer information - */ -static void s3cfb_enable_controller(struct fb_info *fb_info) -{ - struct s3cfb_info *fbi = fb_info->priv; - uint32_t con1; - - con1 = readl(fbi->base + LCDCON1); - - con1 |= ENVID; - - writel(con1, fbi->base + LCDCON1); - - if (fbi->enable) - fbi->enable(1); -} - -/** - * @param fb_info Framebuffer information - */ -static void s3cfb_disable_controller(struct fb_info *fb_info) -{ - struct s3cfb_info *fbi = fb_info->priv; - uint32_t con1; - - if (fbi->enable) - fbi->enable(0); - - con1 = readl(fbi->base + LCDCON1); - - con1 &= ~ENVID; - - writel(con1, fbi->base + LCDCON1); -} - -/** - * Prepare the video hardware for a specified video mode - * @param fb_info Framebuffer information - * @return 0 on success - */ -static int s3cfb_activate_var(struct fb_info *fb_info) -{ - struct s3cfb_info *fbi = fb_info->priv; - struct fb_videomode *mode = fb_info->mode; - unsigned size, hclk, div; - uint32_t con1, con2, con3, con4, con5 = 0; - - if (fbi->passive_display != 0) { - dev_err(fbi->hw_dev, "Passive displays are currently not supported\n"); - return -EINVAL; - } - - /* - * we need at least this amount of memory for the framebuffer - */ - size = mode->xres * mode->yres * (fb_info->bits_per_pixel >> 3); - if (fbi->memory_size != size || fb_info->screen_base == NULL) { - if (fb_info->screen_base) - free(fb_info->screen_base); - fbi->memory_size = 0; - fb_info->screen_base = malloc(size); - if (! fb_info->screen_base) - return -ENOMEM; - memset(fb_info->screen_base, 0, size); - fbi->memory_size = size; - } - - /* ensure video output is _off_ */ - writel(0x00000000, fbi->base + LCDCON1); - - hclk = s3c_get_hclk() / 1000U; /* hclk in kHz */ - div = hclk / PICOS2KHZ(mode->pixclock); - if (div < 3) - div = 3; - /* pixel clock is: (hclk) / ((div + 1) * 2) */ - div += 1; - div >>= 1; - div -= 1; - - con1 = PNRMODE(3) | SET_CLKVAL(div); /* PNRMODE=3 is TFT */ - - switch (fb_info->bits_per_pixel) { - case 16: - con1 |= BPPMODE(12); - con5 |= FRM565; - con5 |= HWSWP; - fb_info->red = def_rgb565[RED]; - fb_info->green = def_rgb565[GREEN]; - fb_info->blue = def_rgb565[BLUE]; - fb_info->transp = def_rgb565[TRANSP]; - break; - case 24: - con1 |= BPPMODE(13); - /* con5 |= BPP24BL; */ /* FIXME maybe needed, check alignment */ - fb_info->red = def_rgb888[RED]; - fb_info->green = def_rgb888[GREEN]; - fb_info->blue = def_rgb888[BLUE]; - fb_info->transp = def_rgb888[TRANSP]; - break; - default: - dev_err(fbi->hw_dev, "Invalid bits per pixel value: %u\n", fb_info->bits_per_pixel); - return -EINVAL; - } - - /* 'normal' in register description means positive logic */ - if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT)) - con5 |= INV_HS; - if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT)) - con5 |= INV_VS; - if (!(mode->sync & FB_SYNC_DE_HIGH_ACT)) - con5 |= INV_DE; - if (mode->sync & FB_SYNC_CLK_INVERT) - con5 |= INV_CLK; /* display should latch at the rising edge */ - if (mode->sync & FB_SYNC_DATA_INVERT) - con5 |= INV_DTA; - if (mode->sync & FB_SYNC_INVERT_PWREN) - con5 |= INV_PWREN; - if (mode->sync & FB_SYNC_INVERT_LEND) - con5 |= INV_LEND; - if (mode->sync & FB_SYNC_USE_PWREN) - con5 |= ENA_PWREN; /* FIXME should this be done conditionally/later? */ - if (mode->sync & FB_SYNC_USE_LEND) - con5 |= ENA_LEND; - if (mode->sync & FB_SYNC_SWAP_BYTES) - con5 ^= BSWP; - if (mode->sync & FB_SYNC_SWAP_HW) - con5 ^= HWSWP; - - /* vertical timing */ - con2 = SET_VBPD(mode->upper_margin - 1) | - SET_LINEVAL(mode->yres - 1) | - SET_VFPD(mode->lower_margin - 1) | - SET_VSPW(mode->vsync_len - 1); - - /* horizontal timing */ - con3 = SET_HBPD(mode->left_margin - 1) | - SET_HOZVAL(mode->xres - 1) | - SET_HFPD(mode->right_margin - 1); - con4 = SET_HSPW(mode->hsync_len - 1); - - /* basic timing setup */ - writel(con1, fbi->base + LCDCON1); - dev_dbg(fbi->hw_dev, "writing %08X into %p (con1)\n", con1, fbi->base + LCDCON1); - writel(con2, fbi->base + LCDCON2); - dev_dbg(fbi->hw_dev, "writing %08X into %p (con2)\n", con2, fbi->base + LCDCON2); - writel(con3, fbi->base + LCDCON3); - dev_dbg(fbi->hw_dev, "writing %08X into %p (con3)\n", con3, fbi->base + LCDCON3); - writel(con4, fbi->base + LCDCON4); - dev_dbg(fbi->hw_dev, "writing %08X into %p (con4)\n", con4, fbi->base + LCDCON4); - writel(con5, fbi->base + LCDCON5); - dev_dbg(fbi->hw_dev, "writing %08X into %p (con5)\n", con5, fbi->base + LCDCON5); - - dev_dbg(fbi->hw_dev, "setting up the fb baseadress to %p\n", fb_info->screen_base); - - /* framebuffer memory setup */ - writel((unsigned)fb_info->screen_base >> 1, fbi->base + LCDSADDR1); - size = mode->xres * (fb_info->bits_per_pixel >> 3) * (mode->yres); - writel(SET_LCDBASEL(((unsigned)fb_info->screen_base + size) >> 1), fbi->base + LCDSADDR2); - writel(SET_OFFSIZE(0) | - SET_PAGE_WIDTH((mode->xres * fb_info->bits_per_pixel) >> 4), - fbi->base + LCDSADDR3); - writel(FIWSEL | INT_FrSyn | INT_FiCnt, fbi->base + LCDINTMSK); - - return 0; -} - -/** - * Print some information about the current hardware state - * @param hw_dev S3C video device - */ -static void s3cfb_info(struct device *hw_dev) -{ - uint32_t con1, addr1, addr2, addr3; - struct s3cfb_info *fbi = hw_dev->priv; - - con1 = readl(fbi->base + LCDCON1); - addr1 = readl(fbi->base + LCDSADDR1); - addr2 = readl(fbi->base + LCDSADDR2); - addr3 = readl(fbi->base + LCDSADDR3); - - printf(" Video hardware info:\n"); - printf(" Video clock is running at %u Hz\n", s3c_get_hclk() / ((GET_CLKVAL(con1) + 1) * 2)); - printf(" Video memory bank starts at 0x%08X\n", GET_LCDBANK(addr1) << 22); - printf(" Video memory bank offset: 0x%08X\n", GET_LCDBASEU(addr1)); - printf(" Video memory end: 0x%08X\n", GET_LCDBASEU(addr2)); - printf(" Virtual screen offset size: %u half words\n", GET_OFFSIZE(addr3)); - printf(" Virtual screen page width: %u half words\n", GET_PAGE_WIDTH(addr3)); -} - -/* - * There is only one video hardware instance available. - * It makes no sense to dynamically allocate this data - */ -static struct fb_ops s3cfb_ops = { - .fb_activate_var = s3cfb_activate_var, - .fb_enable = s3cfb_enable_controller, - .fb_disable = s3cfb_disable_controller, -}; - -static struct s3cfb_info fbi = { - .info = { - .fbops = &s3cfb_ops, - }, -}; - -static int s3cfb_probe(struct device *hw_dev) -{ - struct resource *iores; - struct s3c_fb_platform_data *pdata = hw_dev->platform_data; - int ret; - - if (! pdata) - return -ENODEV; - - iores = dev_request_mem_resource(hw_dev, 0); - if (IS_ERR(iores)) - return PTR_ERR(iores); - fbi.base = IOMEM(iores->start); - writel(0, fbi.base + LCDCON1); - writel(0, fbi.base + LCDCON5); /* FIXME not 0 for some displays */ - - /* just init */ - fbi.info.priv = &fbi; - - /* add runtime hardware info */ - fbi.hw_dev = hw_dev; - hw_dev->priv = &fbi; - - /* add runtime video info */ - fbi.info.modes.modes = pdata->mode_list; - fbi.info.modes.num_modes = pdata->mode_cnt; - fbi.info.mode = &fbi.info.modes.modes[0]; - fbi.info.xres = fbi.info.mode->xres; - fbi.info.yres = fbi.info.mode->yres; - if (pdata->bits_per_pixel) - fbi.info.bits_per_pixel = pdata->bits_per_pixel; - else - fbi.info.bits_per_pixel = 16; - fbi.passive_display = pdata->passive_display; - fbi.enable = pdata->enable; - - if (IS_ENABLED(CONFIG_DRIVER_VIDEO_S3C_VERBOSE)) - hw_dev->info = s3cfb_info; - - fbi.info.dev.parent = hw_dev; - ret = register_framebuffer(&fbi.info); - if (ret != 0) { - dev_err(hw_dev, "Failed to register framebuffer\n"); - return -EINVAL; - } - - return 0; -} - -static struct driver s3cfb_driver = { - .name = "s3c_fb", - .probe = s3cfb_probe, -}; -device_platform_driver(s3cfb_driver); - -/** - * The S3C244x LCD controller supports passive (CSTN/STN) and active (TFT) LC displays - * - * The driver itself currently supports only active TFT LC displays in the follwing manner: - * - * * True colours - * - 16 bpp - * - 24 bpp (untested) - */ diff --git a/drivers/video/stm.c b/drivers/video/stm.c index 1998e1996e..68ac4feed3 100644 --- a/drivers/video/stm.c +++ b/drivers/video/stm.c @@ -20,7 +20,7 @@ #include <stmp-device.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/fb.h> +#include <mach/mxs/fb.h> #define HW_LCDIF_CTRL 0x00 # define CTRL_SFTRST (1 << 31) diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index 1b33529124..d5a83cbb85 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c @@ -8,7 +8,7 @@ #include <io.h> #include <watchdog.h> #include <linux/clk.h> -#include <mach/at91_wdt.h> +#include <mach/at91/at91_wdt.h> #define MIN_WDT_TIMEOUT 1 #define MAX_WDT_TIMEOUT 16 |