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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2021-08-30 13:51:55 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-05 09:05:25 +0200 |
commit | 72fd9b39b9e56ba5e0a2d8a828391efd12b81af0 (patch) | |
tree | 17ccc41a5794ffc0125e42a156532fc7942a6a19 /drivers | |
parent | 19a8bf4942e23c4e1b9513086336c30deb0d115f (diff) | |
download | barebox-72fd9b39b9e56ba5e0a2d8a828391efd12b81af0.tar.gz barebox-72fd9b39b9e56ba5e0a2d8a828391efd12b81af0.tar.xz |
mci: imx-esdhc-pbl: support eMMC boot partitions on i.MX8MP
The i.MX header for SD/MMC starts at an offset to allow for a partition
table at offset 0. i.MX8MN/P bootrom did away with the offset for eMMC
boot partitions, which usually lack on-disk partition tables, but kept a
32-byte offset for SD and eMMC user partitions.
The i.MX8MN/P also introduced a ROM API that allows chainloading from
boot medium by calling back into ROM. This likely handles that
difference for us, but as we don't support it yet and we already have
the PBL eSDHC driver, teach it to detect whether boot is from eMMC boot
partition or not and use the appropriate offset.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210830115156.21907-2-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mci/imx-esdhc-pbl.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c index e649eb8bba..66df4f6dfc 100644 --- a/drivers/mci/imx-esdhc-pbl.c +++ b/drivers/mci/imx-esdhc-pbl.c @@ -25,6 +25,40 @@ #define esdhc_send_cmd __esdhc_send_cmd +static u8 ext_csd[512] __aligned(64); + +static int esdhc_send_ext_csd(struct fsl_esdhc_host *host) +{ + struct mci_cmd cmd; + struct mci_data data; + + cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; + cmd.cmdarg = 0; + cmd.resp_type = MMC_RSP_R1; + + data.dest = ext_csd; + data.blocks = 1; + data.blocksize = sizeof(ext_csd); + data.flags = MMC_DATA_READ; + + return esdhc_send_cmd(host, &cmd, &data); +} + +static bool esdhc_bootpart_active(struct fsl_esdhc_host *host) +{ + unsigned bootpart; + + int ret = esdhc_send_ext_csd(host); + if (ret) + return false; + + bootpart = (ext_csd[EXT_CSD_PARTITION_CONFIG] >> 3) & 0x7; + if (bootpart == 1 || bootpart == 2) + return true; + + return false; +} + static int esdhc_read_blocks(struct fsl_esdhc_host *host, void *dst, size_t len) { struct mci_cmd cmd; @@ -338,14 +372,17 @@ int imx8mp_esdhc_load_image(int instance, bool start) { struct esdhc_soc_data data; struct fsl_esdhc_host host = { 0 }; + u32 offset; int ret; ret = imx8m_esdhc_init(&host, &data, instance); if (ret) return ret; + offset = esdhc_bootpart_active(&host)? 0 : SZ_32K; + return esdhc_load_image(&host, MX8M_DDR_CSD1_BASE_ADDR, - MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K, 0, start); + MX8MQ_ATF_BL33_BASE_ADDR, offset, 0, start); } #endif |