Merge branch 'for-next/kconfig' into next

8 files changed, 6 insertions, 32 deletions

diff --git a/drivers/crypto/imx-scc/Kconfig b/drivers/crypto/imx-scc/Kconfig
index 531304f432..bc4676a10a 100644
--- a/drivers/crypto/imx-scc/Kconfig
+++ b/drivers/crypto/imx-scc/Kconfig
@@ -1,8 +1,6 @@
 config CRYPTO_DEV_MXC_SCC
 	tristate "Support for Freescale Security Controller (SCC)"
 	depends on ARCH_IMX25 && OFTREE
-	select CRYPTO_BLKCIPHER
-	select CRYPTO_DES
 	help
 	  This option enables support for the Security Controller (SCC)
 	  found in Freescale i.MX25 chips.
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5823320b03..efa16b30e4 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -7,9 +7,6 @@ config HAS_AT91_ETHER
 config HAS_CS8900
 	bool
 
-config HAS_DESIGNWARE_ETH
-	bool
-
 config HAS_DM9000
 	bool
 
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 3628a88f7d..b3cfb65c1c 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -273,7 +273,7 @@ static void enc28j60_mem_read(struct enc28j60_net *priv,
 {
 	enc28j60_regw_write(priv, ERDPTL, addr);
 
-	if (IS_ENABLED(CONFIG_ENC28J60_WRITEVERIFY)) {
+	if (IS_ENABLED(CONFIG_DRIVER_NET_ENC28J60_WRITEVERIFY)) {
 		u16 reg;
 		reg = enc28j60_regw_read(priv, ERDPTL);
 		if (reg != addr)
@@ -293,7 +293,7 @@ enc28j60_packet_write(struct enc28j60_net *priv, int len, const u8 *data)
 	/* Set the write pointer to start of transmit buffer area */
 	enc28j60_regw_write(priv, EWRPTL, TXSTART_INIT);
 
-	if (IS_ENABLED(CONFIG_ENC28J60_WRITEVERIFY)) {
+	if (IS_ENABLED(CONFIG_DRIVER_NET_ENC28J60_WRITEVERIFY)) {
 		u16 reg;
 		reg = enc28j60_regw_read(priv, EWRPTL);
 		if (reg != TXSTART_INIT)
@@ -710,7 +710,7 @@ static int enc28j60_eth_send(struct eth_device *edev, void *packet,
 	enc28j60_packet_write(priv, packet_length, packet);
 
 	/* readback and verify written data */
-	if (IS_ENABLED(CONFIG_ENC28J60_WRITEVERIFY)) {
+	if (IS_ENABLED(CONFIG_DRIVER_NET_ENC28J60_WRITEVERIFY)) {
 		int test_len, k;
 		u8 test_buf[64]; /* limit the test to the first 64 bytes */
 		int okflag;
@@ -808,7 +808,7 @@ static void enc28j60_hw_rx(struct eth_device *edev)
 
 	enc28j60_regw_write(priv, ERXRDPTL, erxrdpt);
 
-	if (IS_ENABLED(CONFIG_ENC28J60_WRITEVERIFY)) {
+	if (IS_ENABLED(CONFIG_DRIVER_NET_ENC28J60_WRITEVERIFY)) {
 		u16 reg;
 		reg = enc28j60_regw_read(priv, ERXRDPTL);
 		if (reg != erxrdpt)
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 9ed86afd74..23be25d85d 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -18,10 +18,6 @@ config OFDEVICE
 config OF_ADDRESS_PCI
 	bool
 
-config OF_NET
-	depends on NET
-	def_bool y
-
 config OF_GPIO
 	depends on GPIOLIB
 	depends on OFDEVICE
diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
index 8e56dd7e79..eb4a75558f 100644
--- a/drivers/phy/freescale/Kconfig
+++ b/drivers/phy/freescale/Kconfig
@@ -1,4 +1,4 @@
 config PHY_FSL_IMX8MQ_USB
 	bool "Freescale i.MX8M USB3 PHY"
-	default SOC_IMX8MQ
+	default ARCH_IMX8MQ
 
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index fd75ea6a4f..4f05f5d494 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -93,8 +93,6 @@ config PINCTRL_TEGRA_XUSB
 	  The pinmux controller found on the Tegra 124 line of SoCs used for
 	  the SerDes lanes.
 
-source "drivers/pinctrl/mvebu/Kconfig"
-
 config PINCTRL_VF610
 	bool
 	default y if ARCH_VF610
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
deleted file mode 100644
index af20cad439..0000000000
--- a/drivers/pinctrl/mvebu/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-config PINCTRL_ARMADA_370
-	default y if ARCH_ARMADA_370
-	bool
-
-config PINCTRL_ARMADA_XP
-	bool
-	default y if ARCH_ARMADA_XP
-
-config PINCTRL_DOVE
-	bool
-	default y if ARCH_DOVE
-
-config PINCTRL_KIRKWOOD
-	bool
-	default y if ARCH_KIRKWOOD
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 048f2081f8..9befc5e55f 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -16,7 +16,7 @@ if RESET_CONTROLLER
 
 config RESET_IMX7
 	bool "i.MX7 Reset Driver"
-	default SOC_IMX7D
+	default ARCH_IMX7
 	select MFD_SYSCON
 	help
 	  This enables the reset controller driver for i.MX7 SoCs.