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authorLucas Stach <dev@lynxeye.de>2014-05-14 22:45:33 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-05-15 14:17:12 +0200
commitbbe4ddd10cbda700e6598bcc5a379b3147527d6b (patch)
tree151c1551edbea7b288d60f5325b99dd6e0b301c1 /drivers
parent17a72b1f16445cde1e78604f97b81b5a89e9b3b3 (diff)
downloadbarebox-bbe4ddd10cbda700e6598bcc5a379b3147527d6b.tar.gz
barebox-bbe4ddd10cbda700e6598bcc5a379b3147527d6b.tar.xz
clk: tegra: remove device reset hack
Now that we have a proper reset controller, it isn't necessary anymore to keep the device reset hack coupled to the clock. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/tegra/clk-periph.c18
1 files changed, 0 insertions, 18 deletions
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index be83955db1..c05e563aae 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -74,33 +74,15 @@ static int clk_periph_is_enabled(struct clk *hw)
static int clk_periph_enable(struct clk *hw)
{
struct tegra_clk_periph *periph = to_clk_periph(hw);
- u32 reg;
-
- reg = readl(periph->rst_reg);
- reg |= (1 << periph->rst_shift);
- writel(reg, periph->rst_reg);
periph->gate->ops->enable(periph->gate);
- udelay(2);
-
- reg = readl(periph->rst_reg);
- reg &= ~(1 << periph->rst_shift);
- writel(reg, periph->rst_reg);
-
return 0;
}
static void clk_periph_disable(struct clk *hw)
{
struct tegra_clk_periph *periph = to_clk_periph(hw);
- u32 reg;
-
- reg = readl(periph->rst_reg);
- reg |= (1 << periph->rst_shift);
- writel(reg, periph->rst_reg);
-
- udelay(2);
periph->gate->ops->disable(periph->gate);
}