Merge branch 'for-next/misc' into master

11 files changed, 432 insertions, 18 deletions

diff --git a/drivers/aiodev/Kconfig b/drivers/aiodev/Kconfig
index a4909d8ecd..5fb445c096 100644
--- a/drivers/aiodev/Kconfig
+++ b/drivers/aiodev/Kconfig
@@ -35,4 +35,12 @@ config MC13XXX_ADC
 	help
 	  Support for MC13783, MC13892, MC34708 ADC
 
+config AM335X_ADC
+	tristate "AM335X ADC driver"
+	depends on ARCH_AM33XX
+	help
+	  Support for ADC on TI AM335X SoCs.  Supports simple one-shot readings
+	  rather than continuous sampling with DMA, etc.  ADC channels should be
+	  configured via device tree, using the kernel bindings.
+
 endif
diff --git a/drivers/aiodev/Makefile b/drivers/aiodev/Makefile
index d5318deeb0..5f48b2022a 100644
--- a/drivers/aiodev/Makefile
+++ b/drivers/aiodev/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
 obj-$(CONFIG_LM75) += lm75.o
 obj-$(CONFIG_MC13XXX_ADC) += mc13xxx_adc.o
 obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o
+obj-$(CONFIG_AM335X_ADC) += am335x_adc.o
diff --git a/drivers/aiodev/am335x_adc.c b/drivers/aiodev/am335x_adc.c
new file mode 100644
index 0000000000..0d6cc426eb
--- /dev/null
+++ b/drivers/aiodev/am335x_adc.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* am335x_adc.c
+ *
+ * Copyright © 2019 Synapse Product Development
+ *
+ * Author: Trent Piepho <trent.piepho@synapse.com>
+ *
+ * This is a simple driver for the ADC in TI's AM335x SoCs.  It's designed to
+ * produce one-shot readings and doesn't use the more advanced features, like
+ * the FIFO, triggering, DMA, multi-channel scan programs, etc.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <malloc.h>
+#include <driver.h>
+#include <xfuncs.h>
+#include <errno.h>
+#include <io.h>
+#include <linux/log2.h>
+#include <aiodev.h>
+#include <mach/am33xx-clock.h>
+#include "ti_am335x_tscadc.h"
+
+struct am335x_adc_data {
+	struct aiodevice aiodev;
+	void __iomem *base;
+	struct aiochannel *channels;
+};
+
+static inline void tiadc_write(const struct am335x_adc_data *data, u32 value,
+			       u32 reg)
+{
+	writel(value, data->base + reg);
+}
+
+static inline u32 tiadc_read(const struct am335x_adc_data *data, u32 reg)
+{
+	return readl(data->base + reg);
+}
+
+static int am335x_adc_read(struct aiochannel *chan, int *val)
+{
+	struct am335x_adc_data *data =
+		container_of(chan->aiodev, struct am335x_adc_data, aiodev);
+	int timeout = IDLE_TIMEOUT;
+	/* This assumes VREFN = 0V and VREFP = 1.8V */
+	const u32 vrefp = 1800;	 /* ceil(log2(vrefp)) = 11 */
+	/* Left shift vrefp/4095 by as much as possible without overflowing 32 bits */
+	const u32 shift = 32 - (const_ilog2(vrefp) + 1);
+	const u32 factor = (vrefp << shift) / 4095u;
+	u32 counts;
+
+	/* Make sure FIFO is empty before we start, so we don't get old data */
+	while ((tiadc_read(data, REG_FIFO1CNT) & 0x7f) > 0)
+		tiadc_read(data, REG_FIFO1);
+
+	tiadc_write(data, ENB(chan->index + 1), REG_SE);  /* ENB(1) is 1st channel */
+	tiadc_write(data, CNTRLREG_TSCSSENB, REG_CTRL);
+
+	while ((tiadc_read(data, REG_FIFO1CNT) & 0x7f) == 0) {
+		if (--timeout == 0)
+			return -ETIMEDOUT;
+		mdelay(1);
+	}
+
+	counts = tiadc_read(data, REG_FIFO1) & FIFOREAD_DATA_MASK;
+	*val = (counts * factor) >> shift;
+
+	tiadc_write(data, 0, REG_CTRL);
+
+	return 0;
+}
+
+static int am335x_adc_probe(struct device_d *dev)
+{
+	struct device_node *node;
+	struct am335x_adc_data *data;
+	int i, ret;
+
+	data = xzalloc(sizeof(*data));
+	data->aiodev.hwdev = dev;
+	data->aiodev.read = am335x_adc_read;
+	data->base = dev_request_mem_region(dev, 0);
+	if (IS_ERR(data->base)) {
+		ret = PTR_ERR(data->base);
+		goto fail_data;
+	}
+
+	node = of_find_compatible_node(dev->device_node, NULL, "ti,am3359-adc");
+	if (!node) {
+		ret = -EINVAL;
+		goto fail_data;
+	}
+
+	if (!of_find_property(node, "ti,adc-channels",
+			      &data->aiodev.num_channels))
+		return -EINVAL;
+	data->aiodev.num_channels /= sizeof(u32);
+
+	data->channels = xzalloc(sizeof(*data->channels) *
+				 data->aiodev.num_channels);
+	data->aiodev.channels = xmalloc(sizeof(*data->aiodev.channels) *
+					data->aiodev.num_channels);
+
+	/* Max ADC clock is 24 MHz or 3 MHz, depending on if one looks at the
+	 * reference manual or data sheet.
+	 */
+	tiadc_write(data, DIV_ROUND_UP(am33xx_get_osc_clock(), ADC_CLK) - 1,
+		    REG_CLKDIV);
+	tiadc_write(data, ~0, REG_IRQCLR);
+	tiadc_write(data, ~0, REG_IRQSTATUS);
+	tiadc_write(data, 0x3, REG_DMAENABLE_CLEAR);
+	tiadc_write(data, CNTRLREG_STEPCONFIGWRT, REG_CTRL);
+	tiadc_write(data,
+		    STEPCONFIG_RFP_VREFP | STEPCONFIG_RFM_VREFN |
+		    STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM,
+		    REG_IDLECONFIG);
+
+
+	for (i = 0; i < data->aiodev.num_channels; i++) {
+		u32 config, delay, ain, odelay, sdelay, avg;
+
+		data->aiodev.channels[i] = &data->channels[i];
+		data->channels[i].unit = "mV";
+		ret = of_property_read_u32_index(node, "ti,adc-channels",
+						 i, &ain);
+		if (ret)
+			goto fail_channels;
+
+		ret = of_property_read_u32_index(node, "ti,chan-step-opendelay",
+						 i, &odelay);
+		odelay = ret ? STEPCONFIG_OPENDLY : STEPDELAY_OPEN(odelay);
+
+		ret = of_property_read_u32_index(node, "ti,chan-step-sampledelay",
+						 i, &sdelay);
+		sdelay = ret ? STEPCONFIG_SAMPLEDLY : STEPDELAY_SAMPLE(sdelay);
+
+		ret = of_property_read_u32_index(node, "ti,chan-step-avg",
+						 i, &avg);
+		avg = ret ? STEPCONFIG_AVG_16 : STEPCONFIG_AVG(ilog2(avg ? : 1));
+
+		/* We program each step with one of the channels in the DT */
+		config = STEPCONFIG_RFP_VREFP | STEPCONFIG_RFM_VREFN | /* External refs */
+			 /* Internal reference, use STEPCONFIG_RFP(0) | STEPCONFIG_RFM(0) */
+			 STEPCONFIG_INM_ADCREFM |  /* Not important, SE rather than diff */
+			 STEPCONFIG_MODE(0) | STEPCONFIG_FIFO1 |  /* One-shot and data to FIFO1 */
+			 avg | STEPCONFIG_INP(ain);
+		delay = odelay | sdelay;
+
+		tiadc_write(data, config, REG_STEPCONFIG(i));
+		tiadc_write(data, delay, REG_STEPDELAY(i));
+	}
+	tiadc_write(data, 0, REG_CTRL);
+
+	ret = aiodevice_register(&data->aiodev);
+	if (ret)
+		goto fail_channels;
+
+	dev_info(dev, "TI AM335x ADC (%d ch) registered as %s\n",
+		 data->aiodev.num_channels, dev_name(&data->aiodev.dev));
+	return 0;
+
+ fail_channels:
+	kfree(data->channels);
+	kfree(data->aiodev.channels);
+
+ fail_data:
+	kfree(data);
+	return ret;
+}
+
+static const struct of_device_id of_am335x_adc_match[] = {
+	{ .compatible = "ti,am3359-tscadc", },
+	{ /* end */ }
+};
+
+static struct driver_d am335x_adc_driver = {
+	.name		= "am335x_adc",
+	.probe		= am335x_adc_probe,
+	.of_compatible	= DRV_OF_COMPAT(of_am335x_adc_match),
+};
+device_platform_driver(am335x_adc_driver);
diff --git a/drivers/aiodev/core.c b/drivers/aiodev/core.c
index b8428346a3..7240de2c40 100644
--- a/drivers/aiodev/core.c
+++ b/drivers/aiodev/core.c
@@ -24,7 +24,7 @@
 LIST_HEAD(aiodevices);
 EXPORT_SYMBOL(aiodevices);
 
-struct aiochannel *aiochannel_get_by_name(const char *name)
+struct aiochannel *aiochannel_by_name(const char *name)
 {
 	struct aiodevice *aiodev;
 	int i;
@@ -131,7 +131,7 @@ int aiodevice_register(struct aiodevice *aiodev)
 				  aiochannel_param_get_value,
 				  &aiochan->value, "%d", aiochan);
 
-		aiochan->name = xasprintf("%s.%s", aiodev->name, name);
+		aiochan->name = xasprintf("%s.%s", dev_name(&aiodev->dev), name);
 
 		free(name);
 	}
diff --git a/drivers/aiodev/ti_am335x_tscadc.h b/drivers/aiodev/ti_am335x_tscadc.h
new file mode 100644
index 0000000000..36f3c17ac0
--- /dev/null
+++ b/drivers/aiodev/ti_am335x_tscadc.h
@@ -0,0 +1,163 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __LINUX_TI_AM335X_TSCADC_MFD_H
+#define __LINUX_TI_AM335X_TSCADC_MFD_H
+
+/*
+ * TI Touch Screen / ADC MFD driver
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define REG_RAWIRQSTATUS	0x024
+#define REG_IRQSTATUS		0x028
+#define REG_IRQENABLE		0x02C
+#define REG_IRQCLR		0x030
+#define REG_IRQWAKEUP		0x034
+#define REG_DMAENABLE_SET	0x038
+#define REG_DMAENABLE_CLEAR	0x03c
+#define REG_CTRL		0x040
+#define REG_ADCFSM		0x044
+#define REG_CLKDIV		0x04C
+#define REG_SE			0x054
+#define REG_IDLECONFIG		0x058
+#define REG_CHARGECONFIG	0x05C
+#define REG_CHARGEDELAY		0x060
+#define REG_STEPCONFIG(n)	(0x64 + ((n) * 8))
+#define REG_STEPDELAY(n)	(0x68 + ((n) * 8))
+#define REG_FIFO0CNT		0xE4
+#define REG_FIFO0THR		0xE8
+#define REG_FIFO1CNT		0xF0
+#define REG_FIFO1THR		0xF4
+#define REG_DMA1REQ		0xF8
+#define REG_FIFO0		0x100
+#define REG_FIFO1		0x200
+
+/*	Register Bitfields	*/
+/* IRQ wakeup enable */
+#define IRQWKUP_ENB		BIT(0)
+
+/* Step Enable */
+#define STEPENB_MASK		(0x1FFFF << 0)
+#define STEPENB(val)		((val) << 0)
+#define ENB(val)			(1 << (val))
+#define STPENB_STEPENB		STEPENB(0x1FFFF)
+#define STPENB_STEPENB_TC	STEPENB(0x1FFF)
+
+/* IRQ enable */
+#define IRQENB_HW_PEN		BIT(0)
+#define IRQENB_EOS		BIT(1)
+#define IRQENB_FIFO0THRES	BIT(2)
+#define IRQENB_FIFO0OVRRUN	BIT(3)
+#define IRQENB_FIFO0UNDRFLW	BIT(4)
+#define IRQENB_FIFO1THRES	BIT(5)
+#define IRQENB_FIFO1OVRRUN	BIT(6)
+#define IRQENB_FIFO1UNDRFLW	BIT(7)
+#define IRQENB_PENUP		BIT(9)
+
+/* Step Configuration */
+#define STEPCONFIG_MODE_MASK	(3 << 0)
+#define STEPCONFIG_MODE(val)	((val) << 0)
+#define STEPCONFIG_MODE_SWCNT	STEPCONFIG_MODE(1)
+#define STEPCONFIG_MODE_HWSYNC	STEPCONFIG_MODE(2)
+#define STEPCONFIG_AVG_MASK	(7 << 2)
+#define STEPCONFIG_AVG(val)	((val) << 2)
+#define STEPCONFIG_AVG_16	STEPCONFIG_AVG(4)
+#define STEPCONFIG_XPP		BIT(5)
+#define STEPCONFIG_XNN		BIT(6)
+#define STEPCONFIG_YPP		BIT(7)
+#define STEPCONFIG_YNN		BIT(8)
+#define STEPCONFIG_XNP		BIT(9)
+#define STEPCONFIG_YPN		BIT(10)
+#define STEPCONFIG_RFP(val)	((val) << 12)
+#define STEPCONFIG_RFP_VREFP	(0x3 << 12)
+#define STEPCONFIG_INM_MASK	(0xF << 15)
+#define STEPCONFIG_INM(val)	((val) << 15)
+#define STEPCONFIG_INM_ADCREFM	STEPCONFIG_INM(8)
+#define STEPCONFIG_INP_MASK	(0xF << 19)
+#define STEPCONFIG_INP(val)	((val) << 19)
+#define STEPCONFIG_INP_AN4	STEPCONFIG_INP(4)
+#define STEPCONFIG_INP_ADCREFM	STEPCONFIG_INP(8)
+#define STEPCONFIG_FIFO1	BIT(26)
+#define STEPCONFIG_RFM(val)	((val) << 23)
+#define STEPCONFIG_RFM_VREFN	(0x3 << 23)
+
+/* Delay register */
+#define STEPDELAY_OPEN_MASK	(0x3FFFF << 0)
+#define STEPDELAY_OPEN(val)	((val) << 0)
+#define STEPCONFIG_OPENDLY	STEPDELAY_OPEN(0x098)
+#define STEPDELAY_SAMPLE_MASK	(0xFF << 24)
+#define STEPDELAY_SAMPLE(val)	((val) << 24)
+#define STEPCONFIG_SAMPLEDLY	STEPDELAY_SAMPLE(0)
+
+/* Charge Config */
+#define STEPCHARGE_RFP_MASK	(7 << 12)
+#define STEPCHARGE_RFP(val)	((val) << 12)
+#define STEPCHARGE_RFP_XPUL	STEPCHARGE_RFP(1)
+#define STEPCHARGE_INM_MASK	(0xF << 15)
+#define STEPCHARGE_INM(val)	((val) << 15)
+#define STEPCHARGE_INM_AN1	STEPCHARGE_INM(1)
+#define STEPCHARGE_INP_MASK	(0xF << 19)
+#define STEPCHARGE_INP(val)	((val) << 19)
+#define STEPCHARGE_RFM_MASK	(3 << 23)
+#define STEPCHARGE_RFM(val)	((val) << 23)
+#define STEPCHARGE_RFM_XNUR	STEPCHARGE_RFM(1)
+
+/* Charge delay */
+#define CHARGEDLY_OPEN_MASK	(0x3FFFF << 0)
+#define CHARGEDLY_OPEN(val)	((val) << 0)
+#define CHARGEDLY_OPENDLY	CHARGEDLY_OPEN(0x400)
+
+/* Control register */
+#define CNTRLREG_TSCSSENB	BIT(0)
+#define CNTRLREG_STEPID		BIT(1)
+#define CNTRLREG_STEPCONFIGWRT	BIT(2)
+#define CNTRLREG_POWERDOWN	BIT(4)
+#define CNTRLREG_AFE_CTRL_MASK	(3 << 5)
+#define CNTRLREG_AFE_CTRL(val)	((val) << 5)
+#define CNTRLREG_4WIRE		CNTRLREG_AFE_CTRL(1)
+#define CNTRLREG_5WIRE		CNTRLREG_AFE_CTRL(2)
+#define CNTRLREG_8WIRE		CNTRLREG_AFE_CTRL(3)
+#define CNTRLREG_TSCENB		BIT(7)
+
+/* FIFO READ Register */
+#define FIFOREAD_DATA_BITS	12
+#define FIFOREAD_DATA_MASK	(BIT(FIFOREAD_DATA_BITS) - 1)
+#define FIFOREAD_CHNLID_MASK	(0xf << 16)
+
+/* DMA ENABLE/CLEAR Register */
+#define DMA_FIFO0		BIT(0)
+#define DMA_FIFO1		BIT(1)
+
+/* Sequencer Status */
+#define SEQ_STATUS BIT(5)
+#define CHARGE_STEP		0x11
+
+#define ADC_CLK			3000000
+#define TOTAL_STEPS		16
+#define TOTAL_CHANNELS		8
+#define FIFO1_THRESHOLD		19
+
+/*
+ * time in us for processing a single channel, calculated as follows:
+ *
+ * max num cycles = open delay + (sample delay + conv time) * averaging
+ *
+ * max num cycles: 262143 + (255 + 13) * 16 = 266431
+ *
+ * clock frequency: 26MHz / 8 = 3.25MHz
+ * clock period: 1 / 3.25MHz = 308ns
+ *
+ * max processing time: 266431 * 308ns = 83ms(approx)
+ */
+#define IDLE_TIMEOUT 83 /* milliseconds */
+
+#endif
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 0a2632f963..63cc2e586c 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -23,6 +23,7 @@
 #include <memory.h>
 #include <linux/sizes.h>
 #include <of_graph.h>
+#include <string.h>
 #include <linux/ctype.h>
 #include <linux/amba/bus.h>
 #include <linux/err.h>
@@ -1183,6 +1184,53 @@ int of_property_write_u64_array(struct device_node *np,
 }
 
 /**
+ * of_property_write_strings - Write strings to a property. If
+ * the property does not exist, it will be created and appended to the given
+ * device node.
+ *
+ * @np:		device node to which the property value is to be written.
+ * @propname:	name of the property to be written.
+ * @...:	pointers to strings to write
+ *
+ * Search for a property in a device node and write a string to
+ * it. If the property does not exist, it will be created and appended to
+ * the device node. Returns 0 on success, -ENOMEM if the property or array
+ * of elements cannot be created, -EINVAL if no strings specified.
+ */
+int of_property_write_strings(struct device_node *np,
+			      const char *propname, ...)
+{
+	const char *val;
+	char *buf = NULL, *next;
+	size_t len = 0;
+	va_list ap;
+	int ret = 0;
+
+	va_start(ap, propname);
+	for (val = va_arg(ap, char *); val; val = va_arg(ap, char *))
+		len += strlen(val) + 1;
+	va_end(ap);
+
+	if (!len)
+		return -EINVAL;
+
+	buf = malloc(len);
+	if (!buf)
+		return -ENOMEM;
+
+	next = buf;
+
+	va_start(ap, propname);
+	for (val = va_arg(ap, char *); val; val = va_arg(ap, char *))
+		next = stpcpy(next, val) + 1;
+	va_end(ap);
+
+	ret = of_set_property(np, propname, buf, len, 1);
+	free(buf);
+	return ret;
+}
+
+/**
  * of_property_write_string - Write a string to a property. If
  * the property does not exist, it will be created and appended to the given
  * device node.
diff --git a/drivers/usb/dwc2/dwc2.c b/drivers/usb/dwc2/dwc2.c
index 908d624794..282e6754b0 100644
--- a/drivers/usb/dwc2/dwc2.c
+++ b/drivers/usb/dwc2/dwc2.c
@@ -15,19 +15,6 @@
 
 #include "dwc2.h"
 
-static void dwc2_uninit_common(struct dwc2 *dwc2)
-{
-	uint32_t hprt0;
-
-	hprt0 = dwc2_readl(dwc2, HPRT0);
-
-	/* Put everything in reset. */
-	hprt0 &= ~(HPRT0_ENA | HPRT0_ENACHG | HPRT0_CONNDET | HPRT0_OVRCURRCHG);
-	hprt0 |= HPRT0_RST;
-
-	dwc2_writel(dwc2, hprt0, HPRT0);
-}
-
 static int dwc2_set_mode(void *ctx, enum usb_dr_mode mode)
 {
 	struct dwc2 *dwc2 = ctx;
@@ -98,7 +85,8 @@ static void dwc2_remove(struct device_d *dev)
 {
 	struct dwc2 *dwc2 = dev->priv;
 
-	dwc2_uninit_common(dwc2);
+	dwc2_host_uninit(dwc2);
+	dwc2_gadget_uninit(dwc2);
 }
 
 static const struct of_device_id dwc2_platform_dt_ids[] = {
diff --git a/drivers/usb/dwc2/dwc2.h b/drivers/usb/dwc2/dwc2.h
index 5e845f3491..30ad906656 100644
--- a/drivers/usb/dwc2/dwc2.h
+++ b/drivers/usb/dwc2/dwc2.h
@@ -34,13 +34,17 @@ int dwc2_submit_roothub(struct dwc2 *dwc2, struct usb_device *dev,
 		unsigned long pipe, void *buf, int len,
 		struct devrequest *setup);
 int dwc2_register_host(struct dwc2 *dwc2);
+void dwc2_host_uninit(struct dwc2 *dwc2);
 #else
 static inline int dwc2_register_host(struct dwc2 *dwc2) { return -ENODEV; }
+static inline void dwc2_host_uninit(struct dwc2 *dwc2) {};
 #endif
 
 /* Gadget functions */
 #ifdef CONFIG_USB_DWC2_GADGET
 int dwc2_gadget_init(struct dwc2 *dwc2);
+void dwc2_gadget_uninit(struct dwc2 *dwc2);
 #else
 static inline int dwc2_gadget_init(struct dwc2 *dwc2) { return -ENODEV; }
+static inline void dwc2_gadget_uninit(struct dwc2 *dwc2) {};
 #endif
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 6a65b9b117..aa7447c9b4 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2734,3 +2734,9 @@ int dwc2_gadget_init(struct dwc2 *dwc2)
 
 	return 0;
 }
+
+void dwc2_gadget_uninit(struct dwc2 *dwc2)
+{
+	dwc2_core_disconnect(dwc2);
+	dwc2_gadget_disconnect(dwc2);
+}
diff --git a/drivers/usb/dwc2/host.c b/drivers/usb/dwc2/host.c
index 13cb3472d7..510a07dfb9 100644
--- a/drivers/usb/dwc2/host.c
+++ b/drivers/usb/dwc2/host.c
@@ -788,3 +788,16 @@ int dwc2_register_host(struct dwc2 *dwc2)
 
 	return usb_register_host(host);
 }
+
+void dwc2_host_uninit(struct dwc2 *dwc2)
+{
+	uint32_t hprt0;
+
+	hprt0 = dwc2_readl(dwc2, HPRT0);
+
+	/* Put everything in reset. */
+	hprt0 &= ~(HPRT0_ENA | HPRT0_ENACHG | HPRT0_CONNDET | HPRT0_OVRCURRCHG);
+	hprt0 |= HPRT0_RST;
+
+	dwc2_writel(dwc2, hprt0, HPRT0);
+}
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 68d819af2c..be9651b049 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -1189,8 +1189,8 @@ void musb_host_rx(struct musb *musb, u8 epnum)
 
 	pipe = urb->pipe;
 
-	dev_dbg(musb->controller, "<== hw %d rxcsr %04x, urb actual %d (+dma %zu)\n",
-		epnum, rx_csr, urb->actual_length, 0);
+	dev_dbg(musb->controller, "<== hw %d rxcsr %04x, urb actual %d (+dma 0)\n",
+		epnum, rx_csr, urb->actual_length);
 
 	/* check for errors, concurrent stall & unlink is not really
 	 * handled yet! */