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authorAndrey Panov <rockford@yandex.ru>2015-03-04 23:11:38 +0300
committerSascha Hauer <s.hauer@pengutronix.de>2015-03-05 09:11:34 +0100
commitd7d86c2a6e5db39137f223ca72fa8072b25e4cea (patch)
tree3ef744c876c83d7ebcbeaaf894ae6021e0595f29 /drivers
parent919d4651cee8913482e82a19a9da8409784f4411 (diff)
downloadbarebox-d7d86c2a6e5db39137f223ca72fa8072b25e4cea.tar.gz
barebox-d7d86c2a6e5db39137f223ca72fa8072b25e4cea.tar.xz
NET: arc_emac: Update for newer DTS, support for Rockchip .compatible
Signed-off-by: Andrey Panov <rockford@yandex.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/arc_emac.c24
1 files changed, 17 insertions, 7 deletions
diff --git a/drivers/net/arc_emac.c b/drivers/net/arc_emac.c
index 17705067bc..06c3376975 100644
--- a/drivers/net/arc_emac.c
+++ b/drivers/net/arc_emac.c
@@ -23,6 +23,7 @@
#include <io.h>
#include <init.h>
#include <linux/err.h>
+#include <linux/clk.h>
/* ARC EMAC register set combines entries for MAC and MDIO */
enum {
@@ -99,6 +100,8 @@ struct arc_emac_priv {
u8 *rxbuf;
unsigned int txbd_curr;
unsigned int last_rx_bd;
+ struct clk *clk;
+ struct clk *refclk;
};
/**
@@ -379,20 +382,18 @@ static int arc_emac_mdio_write(struct mii_bus *bus, int phy_addr, int reg_num,
return arc_mdio_complete_wait(priv);
}
+#define DEFAULT_EMAC_CLOCK_FREQUENCY 50000000UL;
+
static int arc_emac_probe(struct device_d *dev)
{
struct eth_device *edev;
struct arc_emac_priv *priv;
- unsigned int clock_frequency;
+ unsigned long clock_frequency;
struct mii_bus *miibus;
u32 id;
- /* Get CPU clock frequency from device tree */
- if (of_property_read_u32(dev->device_node, "clock-frequency",
- &clock_frequency)) {
- dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
- return -EINVAL;
- }
+ /* clock-frequency is dropped from DTS, so hardcode it here */
+ clock_frequency = DEFAULT_EMAC_CLOCK_FREQUENCY;
edev = xzalloc(sizeof(struct eth_device) +
sizeof(struct arc_emac_priv));
@@ -405,6 +406,13 @@ static int arc_emac_probe(struct device_d *dev)
return PTR_ERR(priv->regs);
priv->bus = miibus;
+ priv->clk = clk_get(dev, "hclk");
+ clk_enable(priv->clk);
+
+ priv->refclk = clk_get(dev, "macref");
+ clk_set_rate(priv->refclk, clock_frequency);
+ clk_enable(priv->refclk);
+
id = arc_reg_get(priv, R_ID);
/* Check for EMAC revision 5 or 7, magic number */
if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
@@ -450,6 +458,8 @@ static __maybe_unused struct of_device_id arc_emac_dt_ids[] = {
{
.compatible = "snps,arc-emac",
}, {
+ .compatible = "rockchip,rk3188-emac",
+ }, {
/* sentinel */
}
};