dts: update to v6.4-rc1

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

2 files changed, 0 insertions, 33 deletions

diff --git a/dts/Bindings/arm/mrvl/feroceon.txt b/dts/Bindings/arm/mrvl/feroceon.txt
deleted file mode 100644
index 0d244b999d..0000000000
--- a/dts/Bindings/arm/mrvl/feroceon.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-* Marvell Feroceon Cache
-
-Required properties:
-- compatible : Should be either "marvell,feroceon-cache" or
-  	       "marvell,kirkwood-cache".
-
-Optional properties:
-- reg        : Address of the L2 cache control register. Mandatory for
-  	       "marvell,kirkwood-cache", not used by "marvell,feroceon-cache"
-
-
-Example:
-		l2: l2-cache@20128 {
-			compatible = "marvell,kirkwood-cache";
-			reg = <0x20128 0x4>;
-		};
diff --git a/dts/Bindings/arm/mrvl/tauros2.txt b/dts/Bindings/arm/mrvl/tauros2.txt
deleted file mode 100644
index 31af1cbb60..0000000000
--- a/dts/Bindings/arm/mrvl/tauros2.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-* Marvell Tauros2 Cache
-
-Required properties:
-- compatible : Should be "marvell,tauros2-cache".
-- marvell,tauros2-cache-features : Specify the features supported for the
-  tauros2 cache.
-  The features including
-    CACHE_TAUROS2_PREFETCH_ON       (1 << 0)
-    CACHE_TAUROS2_LINEFILL_BURST8   (1 << 1)
-  The definition can be found at
-  arch/arm/include/asm/hardware/cache-tauros2.h
-
-Example:
-	L2: l2-cache {
-		compatible = "marvell,tauros2-cache";
-		marvell,tauros2-cache-features = <0x3>;
-	};