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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-05-06 08:56:43 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-05-06 08:56:43 +0200 |
commit | 461f8cfc7ea788428240271818363333ceff5c4c (patch) | |
tree | a3d6e3737c203ea29f8db2a6ddaadc326247376c /dts/Bindings/arm/pmu.txt | |
parent | 6345d37ae50c3ac8dd0e6176bc846fe211cbddd4 (diff) | |
download | barebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.gz barebox-461f8cfc7ea788428240271818363333ceff5c4c.tar.xz |
dts: update to v4.1-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm/pmu.txt')
-rw-r--r-- | dts/Bindings/arm/pmu.txt | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/dts/Bindings/arm/pmu.txt b/dts/Bindings/arm/pmu.txt index 75ef91d08f..3b5f5d1088 100644 --- a/dts/Bindings/arm/pmu.txt +++ b/dts/Bindings/arm/pmu.txt @@ -18,12 +18,21 @@ Required properties: "arm,arm11mpcore-pmu" "arm,arm1176-pmu" "arm,arm1136-pmu" + "qcom,scorpion-pmu" + "qcom,scorpion-mp-pmu" "qcom,krait-pmu" - interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu interrupt (PPI) then 1 interrupt should be specified. Optional properties: +- interrupt-affinity : Valid only when using SPIs, specifies a list of phandles + to CPU nodes corresponding directly to the affinity of + the SPIs listed in the interrupts property. + + This property should be present when there is more than + a single SPI. + - qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd events. |