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authorSascha Hauer <s.hauer@pengutronix.de>2023-07-27 07:08:56 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2023-07-27 11:31:04 +0200
commit1f2570eb41c8ebc983e97ff0608d77260c2ba16b (patch)
tree0ef7f7cfc9a20897cf99497facdeedb6fcfb3a61 /dts/Bindings/arm
parent73ead6c5b1ee1ca8c7c83cec1864624b220a0c06 (diff)
downloadbarebox-1f2570eb41c8ebc983e97ff0608d77260c2ba16b.tar.gz
barebox-1f2570eb41c8ebc983e97ff0608d77260c2ba16b.tar.xz
dts: update to v6.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/arm')
-rw-r--r--dts/Bindings/arm/amlogic.yaml9
-rw-r--r--dts/Bindings/arm/arm,coresight-cti.yaml18
-rw-r--r--dts/Bindings/arm/arm,coresight-dummy-sink.yaml73
-rw-r--r--dts/Bindings/arm/arm,coresight-dummy-source.yaml71
-rw-r--r--dts/Bindings/arm/arm,vexpress-juno.yaml10
-rw-r--r--dts/Bindings/arm/atmel-sysregs.txt94
-rw-r--r--dts/Bindings/arm/bcm/brcm,bcm4708.yaml14
-rw-r--r--dts/Bindings/arm/cpus.yaml19
-rw-r--r--dts/Bindings/arm/fsl.yaml14
-rw-r--r--dts/Bindings/arm/keystone/ti,sci.yaml8
-rw-r--r--dts/Bindings/arm/npcm/nuvoton,gcr.yaml50
-rw-r--r--dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml30
-rw-r--r--dts/Bindings/arm/nuvoton/nuvoton,npcm.yaml (renamed from dts/Bindings/arm/npcm/npcm.yaml)2
-rw-r--r--dts/Bindings/arm/psci.yaml2
-rw-r--r--dts/Bindings/arm/qcom.yaml30
-rw-r--r--dts/Bindings/arm/rockchip.yaml24
-rw-r--r--dts/Bindings/arm/samsung/samsung-boards.yaml10
-rw-r--r--dts/Bindings/arm/socionext/synquacer.yaml28
-rw-r--r--dts/Bindings/arm/stm32/st,stm32-syscon.yaml7
-rw-r--r--dts/Bindings/arm/stm32/stm32.yaml12
-rw-r--r--dts/Bindings/arm/sunxi.yaml6
-rw-r--r--dts/Bindings/arm/tegra.yaml14
-rw-r--r--dts/Bindings/arm/ti/k3.yaml26
-rw-r--r--dts/Bindings/arm/xen.txt2
-rw-r--r--dts/Bindings/arm/xilinx.yaml8
25 files changed, 391 insertions, 190 deletions
diff --git a/dts/Bindings/arm/amlogic.yaml b/dts/Bindings/arm/amlogic.yaml
index 274ee08903..08d5984265 100644
--- a/dts/Bindings/arm/amlogic.yaml
+++ b/dts/Bindings/arm/amlogic.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/amlogic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Amlogic MesonX
+title: Amlogic SoC based Platforms
maintainers:
- Kevin Hilman <khilman@baylibre.com>
@@ -205,6 +205,13 @@ properties:
- amlogic,ad401
- const: amlogic,a1
+ - description: Boards with the Amlogic C3 C302X/C308L SoC
+ items:
+ - enum:
+ - amlogic,aw409
+ - amlogic,aw419
+ - const: amlogic,c3
+
- description: Boards with the Amlogic Meson S4 S805X2 SoC
items:
- enum:
diff --git a/dts/Bindings/arm/arm,coresight-cti.yaml b/dts/Bindings/arm/arm,coresight-cti.yaml
index 0c5b875cb6..d6c84b6e7f 100644
--- a/dts/Bindings/arm/arm,coresight-cti.yaml
+++ b/dts/Bindings/arm/arm,coresight-cti.yaml
@@ -287,7 +287,7 @@ examples:
arm,trig-in-sigs = <0 1>;
arm,trig-in-types = <PE_DBGTRIGGER
PE_PMUIRQ>;
- arm,trig-out-sigs=<0 1 2 >;
+ arm,trig-out-sigs = <0 1 2 >;
arm,trig-out-types = <PE_EDBGREQ
PE_DBGRESTART
PE_CTIIRQ>;
@@ -309,24 +309,24 @@ examples:
trig-conns@0 {
reg = <0>;
- arm,trig-in-sigs=<0>;
- arm,trig-in-types=<GEN_INTREQ>;
- arm,trig-out-sigs=<0>;
- arm,trig-out-types=<GEN_HALTREQ>;
+ arm,trig-in-sigs = <0>;
+ arm,trig-in-types = <GEN_INTREQ>;
+ arm,trig-out-sigs = <0>;
+ arm,trig-out-types = <GEN_HALTREQ>;
arm,trig-conn-name = "sys_profiler";
};
trig-conns@1 {
reg = <1>;
- arm,trig-out-sigs=<2 3>;
- arm,trig-out-types=<GEN_HALTREQ GEN_RESTARTREQ>;
+ arm,trig-out-sigs = <2 3>;
+ arm,trig-out-types = <GEN_HALTREQ GEN_RESTARTREQ>;
arm,trig-conn-name = "watchdog";
};
trig-conns@2 {
reg = <2>;
- arm,trig-in-sigs=<1 6>;
- arm,trig-in-types=<GEN_HALTREQ GEN_RESTARTREQ>;
+ arm,trig-in-sigs = <1 6>;
+ arm,trig-in-types = <GEN_HALTREQ GEN_RESTARTREQ>;
arm,trig-conn-name = "g_counter";
};
};
diff --git a/dts/Bindings/arm/arm,coresight-dummy-sink.yaml b/dts/Bindings/arm/arm,coresight-dummy-sink.yaml
new file mode 100644
index 0000000000..cb78cfa567
--- /dev/null
+++ b/dts/Bindings/arm/arm,coresight-dummy-sink.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Coresight Dummy sink component
+
+description: |
+ CoreSight components are compliant with the ARM CoreSight architecture
+ specification and can be connected in various topologies to suit a particular
+ SoCs tracing needs. These trace components can generally be classified as
+ sinks, links and sources. Trace data produced by one or more sources flows
+ through the intermediate links connecting the source to the currently selected
+ sink.
+
+ The Coresight dummy sink component is for the specific coresight sink devices
+ kernel don't have permission to access or configure, e.g., CoreSight EUD on
+ Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
+ debug and trace capabilities. For this device, a dummy driver is needed to
+ register it as Coresight sink device in kernel side, so that path can be
+ created in the driver. Then the trace flow would be transferred to EUD via
+ coresight link of AP processor. It provides Coresight API for operations on
+ dummy source devices, such as enabling and disabling them. It also provides
+ the Coresight dummy source paths for debugging.
+
+ The primary use case of the coresight dummy sink is to build path in kernel
+ side for dummy sink component.
+
+maintainers:
+ - Mike Leach <mike.leach@linaro.org>
+ - Suzuki K Poulose <suzuki.poulose@arm.com>
+ - James Clark <james.clark@arm.com>
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Hao Zhang <quic_hazha@quicinc.com>
+
+properties:
+ compatible:
+ enum:
+ - arm,coresight-dummy-sink
+
+ in-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: Input connection from the Coresight Trace bus to
+ dummy sink, such as Embedded USB debugger(EUD).
+
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - in-ports
+
+additionalProperties: false
+
+examples:
+ # Minimum dummy sink definition. Dummy sink connect to coresight replicator.
+ - |
+ sink {
+ compatible = "arm,coresight-dummy-sink";
+
+ in-ports {
+ port {
+ eud_in_replicator_swao: endpoint {
+ remote-endpoint = <&replicator_swao_out_eud>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/dts/Bindings/arm/arm,coresight-dummy-source.yaml b/dts/Bindings/arm/arm,coresight-dummy-source.yaml
new file mode 100644
index 0000000000..5fedaed49a
--- /dev/null
+++ b/dts/Bindings/arm/arm,coresight-dummy-source.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Coresight Dummy source component
+
+description: |
+ CoreSight components are compliant with the ARM CoreSight architecture
+ specification and can be connected in various topologies to suit a particular
+ SoCs tracing needs. These trace components can generally be classified as
+ sinks, links and sources. Trace data produced by one or more sources flows
+ through the intermediate links connecting the source to the currently selected
+ sink.
+
+ The Coresight dummy source component is for the specific coresight source
+ devices kernel don't have permission to access or configure. For some SOCs,
+ there would be Coresight source trace components on sub-processor which
+ are conneted to AP processor via debug bus. For these devices, a dummy driver
+ is needed to register them as Coresight source devices, so that paths can be
+ created in the driver. It provides Coresight API for operations on dummy
+ source devices, such as enabling and disabling them. It also provides the
+ Coresight dummy source paths for debugging.
+
+ The primary use case of the coresight dummy source is to build path in kernel
+ side for dummy source component.
+
+maintainers:
+ - Mike Leach <mike.leach@linaro.org>
+ - Suzuki K Poulose <suzuki.poulose@arm.com>
+ - James Clark <james.clark@arm.com>
+ - Mao Jinlong <quic_jinlmao@quicinc.com>
+ - Hao Zhang <quic_hazha@quicinc.com>
+
+properties:
+ compatible:
+ enum:
+ - arm,coresight-dummy-source
+
+ out-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port:
+ description: Output connection from the source to Coresight
+ Trace bus.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - out-ports
+
+additionalProperties: false
+
+examples:
+ # Minimum dummy source definition. Dummy source connect to coresight funnel.
+ - |
+ source {
+ compatible = "arm,coresight-dummy-source";
+
+ out-ports {
+ port {
+ dummy_riscv_out_funnel_swao: endpoint {
+ remote-endpoint = <&funnel_swao_in_dummy_riscv>;
+ };
+ };
+ };
+ };
+
+...
diff --git a/dts/Bindings/arm/arm,vexpress-juno.yaml b/dts/Bindings/arm/arm,vexpress-juno.yaml
index 09c319f803..cdd65881fc 100644
--- a/dts/Bindings/arm/arm,vexpress-juno.yaml
+++ b/dts/Bindings/arm/arm,vexpress-juno.yaml
@@ -122,14 +122,14 @@ properties:
arm,vexpress,position:
description: When daughterboards are stacked on one site, their position
in the stack be be described this attribute.
- $ref: '/schemas/types.yaml#/definitions/uint32'
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
arm,vexpress,dcc:
description: When describing tiles consisting of more than one DCC, its
number can be specified with this attribute.
- $ref: '/schemas/types.yaml#/definitions/uint32'
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 3
@@ -180,13 +180,13 @@ patternProperties:
- const: simple-bus
arm,v2m-memory-map:
description: This describes the memory map type.
- $ref: '/schemas/types.yaml#/definitions/string'
+ $ref: /schemas/types.yaml#/definitions/string
enum:
- rs1
- rs2
arm,hbi:
- $ref: '/schemas/types.yaml#/definitions/uint32'
+ $ref: /schemas/types.yaml#/definitions/uint32
description: This indicates the ARM HBI (Hardware Board ID), this is
ARM's unique board model ID, visible on the PCB's silkscreen.
@@ -197,7 +197,7 @@ patternProperties:
property, describing the physical location of the children nodes.
0 means motherboard site, while 1 and 2 are daughterboard sites, and
0xf means "sisterboard" which is the site containing the main CPU tile.
- $ref: '/schemas/types.yaml#/definitions/uint32'
+ $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
diff --git a/dts/Bindings/arm/atmel-sysregs.txt b/dts/Bindings/arm/atmel-sysregs.txt
index ab1b352344..67a66bf748 100644
--- a/dts/Bindings/arm/atmel-sysregs.txt
+++ b/dts/Bindings/arm/atmel-sysregs.txt
@@ -52,100 +52,6 @@ Example:
reg = <0xe3804000 0x1000>;
};
-SHDWC Shutdown Controller
-
-required properties:
-- compatible: Should be "atmel,<chip>-shdwc".
- <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
-- reg: Should contain registers location and length
-- clocks: phandle to input clock.
-
-optional properties:
-- atmel,wakeup-mode: String, operation mode of the wakeup mode.
- Supported values are: "none", "high", "low", "any".
-- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
-
-optional at91sam9260 properties:
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9rl properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9x5 properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-
-Example:
-
- shdwc@fffffd10 {
- compatible = "atmel,at91sam9260-shdwc";
- reg = <0xfffffd10 0x10>;
- clocks = <&clk32k>;
- };
-
-SHDWC SAMA5D2-Compatible Shutdown Controller
-
-1) shdwc node
-
-required properties:
-- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
- "microchip,sama7g5-shdwc"
-- reg: should contain registers location and length
-- clocks: phandle to input clock.
-- #address-cells: should be one. The cell is the wake-up input index.
-- #size-cells: should be zero.
-
-optional properties:
-
-- debounce-delay-us: minimum wake-up inputs debouncer period in
- microseconds. It's usually a board-related property.
-- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
-
-optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-The node contains child nodes for each wake-up input that the platform uses.
-
-2) input nodes
-
-Wake-up input nodes are usually described in the "board" part of the Device
-Tree. Note also that input 0 is linked to the wake-up pin and is frequently
-used.
-
-Required properties:
-- reg: should contain the wake-up input index [0 - 15].
-
-Optional properties:
-- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
- by the child, forces the wake-up of the core power supply on a high level.
- The default is to be active low.
-
-Example:
-
-On the SoC side:
- shdwc@f8048010 {
- compatible = "atmel,sama5d2-shdwc";
- reg = <0xf8048010 0x10>;
- clocks = <&clk32k>;
- #address-cells = <1>;
- #size-cells = <0>;
- atmel,wakeup-rtc-timer;
- };
-
-On the board side:
- shdwc@f8048010 {
- debounce-delay-us = <976>;
-
- input@0 {
- reg = <0>;
- };
-
- input@1 {
- reg = <1>;
- atmel,wakeup-active-high;
- };
- };
-
Special Function Registers (SFR)
Special Function Registers (SFR) manage specific aspects of the integrated
diff --git a/dts/Bindings/arm/bcm/brcm,bcm4708.yaml b/dts/Bindings/arm/bcm/brcm,bcm4708.yaml
index 454b0e9324..5c3ac97e87 100644
--- a/dts/Bindings/arm/bcm/brcm,bcm4708.yaml
+++ b/dts/Bindings/arm/bcm/brcm,bcm4708.yaml
@@ -25,13 +25,15 @@ properties:
- enum:
- asus,rt-ac56u
- asus,rt-ac68u
+ - buffalo,wzr-1166dhp
+ - buffalo,wzr-1166dhp2
- buffalo,wzr-1750dhp
- linksys,ea6300-v1
- linksys,ea6500-v2
- - luxul,xap-1510v1
+ - luxul,xap-1510-v1
- luxul,xwc-1000
- - netgear,r6250v1
- - netgear,r6300v2
+ - netgear,r6250-v1
+ - netgear,r6300-v2
- smartrg,sr400ac
- brcm,bcm94708
- const: brcm,bcm4708
@@ -42,8 +44,8 @@ properties:
- asus,rt-n18u
- buffalo,wzr-600dhp2
- buffalo,wzr-900dhp
- - luxul,xap-1410v1
- - luxul,xwr-1200v1
+ - luxul,xap-1410-v1
+ - luxul,xwr-1200-v1
- tplink,archer-c5-v2
- const: brcm,bcm47081
- const: brcm,bcm4708
@@ -72,7 +74,7 @@ properties:
- luxul,xap-1610-v1
- luxul,xbr-4500-v1
- luxul,xwc-2000-v1
- - luxul,xwr-3100v1
+ - luxul,xwr-3100-v1
- luxul,xwr-3150-v1
- netgear,r8500
- phicomm,k3
diff --git a/dts/Bindings/arm/cpus.yaml b/dts/Bindings/arm/cpus.yaml
index ff272e517d..9e6a45eea4 100644
--- a/dts/Bindings/arm/cpus.yaml
+++ b/dts/Bindings/arm/cpus.yaml
@@ -153,6 +153,7 @@ properties:
- arm,cortex-r4
- arm,cortex-r5
- arm,cortex-r7
+ - arm,cortex-r52
- arm,cortex-x1
- arm,cortex-x1c
- arm,cortex-x2
@@ -196,7 +197,7 @@ properties:
- qcom,scorpion
enable-method:
- $ref: '/schemas/types.yaml#/definitions/string'
+ $ref: /schemas/types.yaml#/definitions/string
oneOf:
# On ARM v8 64-bit this property is required
- enum:
@@ -245,8 +246,8 @@ properties:
cpu-release-addr:
oneOf:
- - $ref: '/schemas/types.yaml#/definitions/uint32'
- - $ref: '/schemas/types.yaml#/definitions/uint64'
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - $ref: /schemas/types.yaml#/definitions/uint64
description:
The DT specification defines this as 64-bit always, but some 32-bit Arm
systems have used a 32-bit value which must be supported.
@@ -254,7 +255,7 @@ properties:
property value of "spin-table".
cpu-idle-states:
- $ref: '/schemas/types.yaml#/definitions/phandle-array'
+ $ref: /schemas/types.yaml#/definitions/phandle-array
items:
maxItems: 1
description: |
@@ -270,7 +271,7 @@ properties:
cci-control-port: true
dynamic-power-coefficient:
- $ref: '/schemas/types.yaml#/definitions/uint32'
+ $ref: /schemas/types.yaml#/definitions/uint32
description:
A u32 value that represents the running time dynamic
power coefficient in units of uW/MHz/V^2. The
@@ -307,7 +308,7 @@ properties:
PM domain provider, must be "psci".
qcom,saw:
- $ref: '/schemas/types.yaml#/definitions/phandle'
+ $ref: /schemas/types.yaml#/definitions/phandle
description: |
Specifies the SAW* node associated with this CPU.
@@ -317,7 +318,7 @@ properties:
* arm/msm/qcom,saw2.txt
qcom,acc:
- $ref: '/schemas/types.yaml#/definitions/phandle'
+ $ref: /schemas/types.yaml#/definitions/phandle
description: |
Specifies the ACC* node associated with this CPU.
@@ -328,7 +329,7 @@ properties:
* arm/msm/qcom,kpss-acc.txt
rockchip,pmu:
- $ref: '/schemas/types.yaml#/definitions/phandle'
+ $ref: /schemas/types.yaml#/definitions/phandle
description: |
Specifies the syscon node controlling the cpu core power domains.
@@ -338,7 +339,7 @@ properties:
the cpu-core power-domains.
secondary-boot-reg:
- $ref: '/schemas/types.yaml#/definitions/uint32'
+ $ref: /schemas/types.yaml#/definitions/uint32
description: |
Required for systems that have an "enable-method" property value of
"brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".
diff --git a/dts/Bindings/arm/fsl.yaml b/dts/Bindings/arm/fsl.yaml
index 15d4110840..2510eaa890 100644
--- a/dts/Bindings/arm/fsl.yaml
+++ b/dts/Bindings/arm/fsl.yaml
@@ -726,6 +726,12 @@ properties:
- const: dh,imx6ull-dhcor-som
- const: fsl,imx6ull
+ - description: i.MX6ULL DHCOR SoM based Boards
+ items:
+ - const: marantec,imx6ull-dhcor-maveo-box
+ - const: dh,imx6ull-dhcor-som
+ - const: fsl,imx6ull
+
- description: i.MX6ULL PHYTEC phyBOARD-Segin
items:
- enum:
@@ -901,6 +907,7 @@ properties:
- emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base
- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
- fsl,imx8mm-evk # i.MX8MM EVK Board
+ - fsl,imx8mm-evkb # i.MX8MM EVKB Board
- gateworks,imx8mm-gw7904
- gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
- gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit
@@ -918,6 +925,12 @@ properties:
- prt,prt8mm # i.MX8MM Protonic PRT8MM Board
- const: fsl,imx8mm
+ - description: Emtop i.MX8MM based Boards
+ items:
+ - const: ees,imx8mm-emtop-baseboard # i.MX8MM Emtop SoM on i.MX8M Mini Baseboard V1
+ - const: ees,imx8mm-emtop-som # i.MX8MM Emtop SOM-IMX8MMLPD4 module
+ - const: fsl,imx8mm
+
- description: Engicam i.Core MX8M Mini SoM based boards
items:
- enum:
@@ -1019,6 +1032,7 @@ properties:
- dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC
- fsl,imx8mp-evk # i.MX8MP EVK Board
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
+ - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board
- polyhex,imx8mp-debix # Polyhex Debix boards
- polyhex,imx8mp-debix-model-a # Polyhex Debix Model A Board
- toradex,verdin-imx8mp # Verdin iMX8M Plus Modules
diff --git a/dts/Bindings/arm/keystone/ti,sci.yaml b/dts/Bindings/arm/keystone/ti,sci.yaml
index 91b96065f7..86b59de770 100644
--- a/dts/Bindings/arm/keystone/ti,sci.yaml
+++ b/dts/Bindings/arm/keystone/ti,sci.yaml
@@ -96,8 +96,8 @@ examples:
compatible = "ti,k2g-sci";
ti,system-reboot-controller;
mbox-names = "rx", "tx";
- mboxes= <&msgmgr 5 2>,
- <&msgmgr 0 0>;
+ mboxes = <&msgmgr 5 2>,
+ <&msgmgr 0 0>;
reg-names = "debug_messages";
reg = <0x02921800 0x800>;
};
@@ -107,8 +107,8 @@ examples:
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_main 11>,
- <&secure_proxy_main 13>;
+ mboxes = <&secure_proxy_main 11>,
+ <&secure_proxy_main 13>;
reg-names = "debug_messages";
reg = <0x44083000 0x1000>;
diff --git a/dts/Bindings/arm/npcm/nuvoton,gcr.yaml b/dts/Bindings/arm/npcm/nuvoton,gcr.yaml
deleted file mode 100644
index 94e72f25b3..0000000000
--- a/dts/Bindings/arm/npcm/nuvoton,gcr.yaml
+++ /dev/null
@@ -1,50 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Global Control Registers block in Nuvoton SoCs
-
-maintainers:
- - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
- - Tomer Maimon <tmaimon77@gmail.com>
-
-description:
- The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs
- that expose misc functionality such as chip model and version information or
- pinmux settings.
-
-properties:
- compatible:
- items:
- - enum:
- - nuvoton,wpcm450-gcr
- - nuvoton,npcm750-gcr
- - nuvoton,npcm845-gcr
- - const: syscon
- - const: simple-mfd
-
- reg:
- maxItems: 1
-
-required:
- - compatible
- - reg
-
-additionalProperties:
- type: object
-
-examples:
- - |
- gcr: syscon@800000 {
- compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
- reg = <0x800000 0x1000>;
-
- mux-controller {
- compatible = "mmio-mux";
- #mux-control-cells = <1>;
- mux-reg-masks = <0x38 0x07>;
- idle-states = <2>;
- };
- };
diff --git a/dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml b/dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml
new file mode 100644
index 0000000000..fb190db615
--- /dev/null
+++ b/dts/Bindings/arm/nuvoton/nuvoton,ma35d1.yaml
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/nuvoton/nuvoton,ma35d1.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35 series SoC based platforms
+
+maintainers:
+ - Jacky Huang <ychuang3@nuvoton.com>
+
+description: |
+ Boards with an ARMv8 based Nuvoton MA35 series SoC shall have
+ the following properties.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+
+ - description: MA35D1 based boards
+ items:
+ - enum:
+ - nuvoton,ma35d1-iot
+ - nuvoton,ma35d1-som
+ - const: nuvoton,ma35d1
+
+additionalProperties: true
+...
diff --git a/dts/Bindings/arm/npcm/npcm.yaml b/dts/Bindings/arm/nuvoton/nuvoton,npcm.yaml
index 6871483947..d386744c88 100644
--- a/dts/Bindings/arm/npcm/npcm.yaml
+++ b/dts/Bindings/arm/nuvoton/nuvoton,npcm.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
-$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml#
+$id: http://devicetree.org/schemas/arm/nuvoton/nuvoton,npcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NPCM Platforms
diff --git a/dts/Bindings/arm/psci.yaml b/dts/Bindings/arm/psci.yaml
index 3a2c908ff2..0c5381e081 100644
--- a/dts/Bindings/arm/psci.yaml
+++ b/dts/Bindings/arm/psci.yaml
@@ -100,7 +100,7 @@ properties:
patternProperties:
"^power-domain-":
- $ref: "../power/power-domain.yaml#"
+ $ref: /schemas/power/power-domain.yaml#
type: object
description: |
diff --git a/dts/Bindings/arm/qcom.yaml b/dts/Bindings/arm/qcom.yaml
index d9dd25695c..450f616774 100644
--- a/dts/Bindings/arm/qcom.yaml
+++ b/dts/Bindings/arm/qcom.yaml
@@ -40,6 +40,7 @@ description: |
msm8939
msm8953
msm8956
+ msm8960
msm8974
msm8976
msm8992
@@ -69,6 +70,7 @@ description: |
sdm845
sdx55
sdx65
+ sdx75
sm4250
sm6115
sm6115p
@@ -85,9 +87,15 @@ description: |
The 'board' element must be one of the following strings:
adp
+ ap-al02-c2
+ ap-al02-c6
ap-al02-c7
+ ap-al02-c8
+ ap-al02-c9
ap-mi01.2
+ ap-mi01.3
ap-mi01.6
+ ap-mi01.9
cdp
cp01-c1
dragonboard
@@ -191,6 +199,7 @@ properties:
- items:
- enum:
- qcom,msm8960-cdp
+ - samsung,expressatt
- const: qcom,msm8960
- items:
@@ -333,7 +342,9 @@ properties:
- items:
- enum:
- qcom,ipq5332-ap-mi01.2
+ - qcom,ipq5332-ap-mi01.3
- qcom,ipq5332-ap-mi01.6
+ - qcom,ipq5332-ap-mi01.9
- const: qcom,ipq5332
- items:
@@ -351,7 +362,11 @@ properties:
- items:
- enum:
+ - qcom,ipq9574-ap-al02-c2
+ - qcom,ipq9574-ap-al02-c6
- qcom,ipq9574-ap-al02-c7
+ - qcom,ipq9574-ap-al02-c8
+ - qcom,ipq9574-ap-al02-c9
- const: qcom,ipq9574
- description: Sierra Wireless MangOH Green with WP8548 Module
@@ -380,9 +395,9 @@ properties:
- qcom,qru1000-idp
- const: qcom,qru1000
- - description: Qualcomm Technologies, Inc. SC7180 IDP
- items:
+ - items:
- enum:
+ - acer,aspire1
- qcom,sc7180-idp
- const: qcom,sc7180
@@ -821,6 +836,11 @@ properties:
- items:
- enum:
+ - qcom,sdx75-idp
+ - const: qcom,sdx75
+
+ - items:
+ - enum:
- qcom,ipq6018-cp01
- qcom,ipq6018-cp01-c1
- const: qcom,ipq6018
@@ -884,6 +904,11 @@ properties:
- items:
- enum:
+ - fxtec,pro1x
+ - const: qcom,sm6115
+
+ - items:
+ - enum:
- lenovo,j606f
- const: qcom,sm6115p
- const: qcom,sm6115
@@ -1042,6 +1067,7 @@ allOf:
- qcom,sdm845
- qcom,sdx55
- qcom,sdx65
+ - qcom,sdx75
- qcom,sm4250
- qcom,sm6115
- qcom,sm6125
diff --git a/dts/Bindings/arm/rockchip.yaml b/dts/Bindings/arm/rockchip.yaml
index ec141c937b..ecdb72a519 100644
--- a/dts/Bindings/arm/rockchip.yaml
+++ b/dts/Bindings/arm/rockchip.yaml
@@ -40,6 +40,11 @@ properties:
- const: anbernic,rg353p
- const: rockchip,rk3566
+ - description: Anbernic RG353PS
+ items:
+ - const: anbernic,rg353ps
+ - const: rockchip,rk3566
+
- description: Anbernic RG353V
items:
- const: anbernic,rg353v
@@ -102,6 +107,12 @@ properties:
- const: edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM
- const: rockchip,rk3588
+ - description: Edgeble Neural Compute Module 6(Neu6) Model B SoM based boards
+ items:
+ - const: edgeble,neural-compute-module-6b-io # Edgeble Neural Compute Module 6B IO Board
+ - const: edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM
+ - const: rockchip,rk3588
+
- description: Elgin RV1108 R1
items:
- const: elgin,rv1108-r1
@@ -189,6 +200,7 @@ properties:
items:
- enum:
- friendlyarm,nanopi-r2c
+ - friendlyarm,nanopi-r2c-plus
- friendlyarm,nanopi-r2s
- const: rockchip,rk3328
@@ -534,6 +546,11 @@ properties:
- const: hugsun,x99
- const: rockchip,rk3399
+ - description: Indiedroid Nova SBC
+ items:
+ - const: indiedroid,nova
+ - const: rockchip,rk3588s
+
- description: Khadas Edge series boards
items:
- enum:
@@ -562,6 +579,13 @@ properties:
- const: leez,p710
- const: rockchip,rk3399
+ - description: Lunzn FastRhino R66S / R68S
+ items:
+ - enum:
+ - lunzn,fastrhino-r66s
+ - lunzn,fastrhino-r68s
+ - const: rockchip,rk3568
+
- description: mqmaker MiQi
items:
- const: mqmaker,miqi
diff --git a/dts/Bindings/arm/samsung/samsung-boards.yaml b/dts/Bindings/arm/samsung/samsung-boards.yaml
index deb2cf9718..e3ffd8159a 100644
--- a/dts/Bindings/arm/samsung/samsung-boards.yaml
+++ b/dts/Bindings/arm/samsung/samsung-boards.yaml
@@ -72,6 +72,16 @@ properties:
- const: samsung,exynos4210
- const: samsung,exynos4
+ - description: Samsung Galaxy Tab3 family boards
+ items:
+ - enum:
+ - samsung,t310 # Samsung Galaxy Tab 3 8.0 WiFi (SM-T310)
+ - samsung,t311 # Samsung Galaxy Tab 3 8.0 3G (SM-T311)
+ - samsung,t315 # Samsung Galaxy Tab 3 8.0 LTE (SM-T315)
+ - const: samsung,tab3
+ - const: samsung,exynos4212
+ - const: samsung,exynos4
+
- description: Exynos4412 based boards
items:
- enum:
diff --git a/dts/Bindings/arm/socionext/synquacer.yaml b/dts/Bindings/arm/socionext/synquacer.yaml
new file mode 100644
index 0000000000..72554a4f1c
--- /dev/null
+++ b/dts/Bindings/arm/socionext/synquacer.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/socionext/synquacer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext Synquacer platform
+
+maintainers:
+ - Masahisa Kojima <masahisa.kojima@linaro.org>
+ - Jassi Brar <jaswinder.singh@linaro.org>
+
+description:
+ Socionext SC2A11B (Synquacer) SoC based boards
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - socionext,developer-box
+ - const: socionext,synquacer
+
+additionalProperties: true
+
+...
diff --git a/dts/Bindings/arm/stm32/st,stm32-syscon.yaml b/dts/Bindings/arm/stm32/st,stm32-syscon.yaml
index ad8e51aa01..b63ff591ef 100644
--- a/dts/Bindings/arm/stm32/st,stm32-syscon.yaml
+++ b/dts/Bindings/arm/stm32/st,stm32-syscon.yaml
@@ -15,12 +15,13 @@ properties:
oneOf:
- items:
- enum:
- - st,stm32mp157-syscfg
- - st,stm32mp151-pwr-mcu
- - st,stm32-syscfg
- st,stm32-power-config
+ - st,stm32-syscfg
- st,stm32-tamp
- st,stm32f4-gcan
+ - st,stm32mp151-pwr-mcu
+ - st,stm32mp157-syscfg
+ - st,stm32mp25-syscfg
- const: syscon
- items:
- const: st,stm32-tamp
diff --git a/dts/Bindings/arm/stm32/stm32.yaml b/dts/Bindings/arm/stm32/stm32.yaml
index 13e3424114..4466b455bf 100644
--- a/dts/Bindings/arm/stm32/stm32.yaml
+++ b/dts/Bindings/arm/stm32/stm32.yaml
@@ -155,6 +155,18 @@ properties:
- const: seeed,stm32mp157c-odyssey-som
- const: st,stm32mp157
+ - description: Phytec STM32MP1 SoM based Boards
+ items:
+ - const: phytec,phycore-stm32mp1-3
+ - const: phytec,phycore-stm32mp157c-som
+ - const: st,stm32mp157
+
+ - description: ST STM32MP257 based Boards
+ items:
+ - enum:
+ - st,stm32mp257f-ev1
+ - const: st,stm32mp257
+
additionalProperties: true
...
diff --git a/dts/Bindings/arm/sunxi.yaml b/dts/Bindings/arm/sunxi.yaml
index 013821f4a7..ee8fdd2da8 100644
--- a/dts/Bindings/arm/sunxi.yaml
+++ b/dts/Bindings/arm/sunxi.yaml
@@ -305,6 +305,12 @@ properties:
- const: allwinner,i12-tvbox
- const: allwinner,sun7i-a20
+ - description: ICnova A20 ADB4006
+ items:
+ - const: incircuit,icnova-a20-adb4006
+ - const: incircuit,icnova-a20
+ - const: allwinner,sun7i-a20
+
- description: ICNova A20 SWAC
items:
- const: incircuit,icnova-a20-swac
diff --git a/dts/Bindings/arm/tegra.yaml b/dts/Bindings/arm/tegra.yaml
index 0df41f5b7e..fcf9564061 100644
--- a/dts/Bindings/arm/tegra.yaml
+++ b/dts/Bindings/arm/tegra.yaml
@@ -167,6 +167,11 @@ properties:
- const: nvidia,p3737-0000+p3701-0000
- const: nvidia,p3701-0000
- const: nvidia,tegra234
+ - description: NVIDIA IGX Orin Development Kit
+ items:
+ - const: nvidia,p3740-0002+p3701-0008
+ - const: nvidia,p3701-0008
+ - const: nvidia,tegra234
- description: Jetson Orin NX
items:
- const: nvidia,p3767-0000
@@ -176,5 +181,14 @@ properties:
- const: nvidia,p3768-0000+p3767-0000
- const: nvidia,p3767-0000
- const: nvidia,tegra234
+ - description: Jetson Orin Nano
+ items:
+ - const: nvidia,p3767-0005
+ - const: nvidia,tegra234
+ - description: Jetson Orin Nano Developer Kit
+ items:
+ - const: nvidia,p3768-0000+p3767-0005
+ - const: nvidia,p3767-0005
+ - const: nvidia,tegra234
additionalProperties: true
diff --git a/dts/Bindings/arm/ti/k3.yaml b/dts/Bindings/arm/ti/k3.yaml
index e1183f90bb..577eee95c8 100644
--- a/dts/Bindings/arm/ti/k3.yaml
+++ b/dts/Bindings/arm/ti/k3.yaml
@@ -25,6 +25,12 @@ properties:
- ti,am62a7-sk
- const: ti,am62a7
+ - description: K3 AM625 SoC PHYTEC phyBOARD-Lyra
+ items:
+ - const: phytec,am625-phyboard-lyra-rdk
+ - const: phytec,am62-phycore-som
+ - const: ti,am625
+
- description: K3 AM625 SoC
items:
- enum:
@@ -33,6 +39,26 @@ properties:
- ti,am62-lp-sk
- const: ti,am625
+ - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards
+ items:
+ - enum:
+ - toradex,verdin-am62-nonwifi-dahlia # Verdin AM62 Module on Dahlia
+ - toradex,verdin-am62-nonwifi-dev # Verdin AM62 Module on Verdin Development Board
+ - toradex,verdin-am62-nonwifi-yavia # Verdin AM62 Module on Yavia
+ - const: toradex,verdin-am62-nonwifi # Verdin AM62 Module without Wi-Fi / BT
+ - const: toradex,verdin-am62 # Verdin AM62 Module
+ - const: ti,am625
+
+ - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards with Wi-Fi / BT
+ items:
+ - enum:
+ - toradex,verdin-am62-wifi-dahlia # Verdin AM62 Wi-Fi / BT Module on Dahlia
+ - toradex,verdin-am62-wifi-dev # Verdin AM62 Wi-Fi / BT M. on Verdin Development B.
+ - toradex,verdin-am62-wifi-yavia # Verdin AM62 Wi-Fi / BT Module on Yavia
+ - const: toradex,verdin-am62-wifi # Verdin AM62 Wi-Fi / BT Module
+ - const: toradex,verdin-am62 # Verdin AM62 Module
+ - const: ti,am625
+
- description: K3 AM642 SoC
items:
- enum:
diff --git a/dts/Bindings/arm/xen.txt b/dts/Bindings/arm/xen.txt
index 61d77acbeb..f925290d46 100644
--- a/dts/Bindings/arm/xen.txt
+++ b/dts/Bindings/arm/xen.txt
@@ -56,7 +56,7 @@ hypervisor {
};
The format and meaning of the "xen,uefi-*" parameters are similar to those in
-Documentation/arm/uefi.rst, which are provided by the regular UEFI stub. However
+Documentation/arch/arm/uefi.rst, which are provided by the regular UEFI stub. However
they differ because they are provided by the Xen hypervisor, together with a set
of UEFI runtime services implemented via hypercalls, see
http://xenbits.xen.org/docs/unstable/hypercall/x86_64/include,public,platform.h.html.
diff --git a/dts/Bindings/arm/xilinx.yaml b/dts/Bindings/arm/xilinx.yaml
index 969cfe6dc4..f57ed03478 100644
--- a/dts/Bindings/arm/xilinx.yaml
+++ b/dts/Bindings/arm/xilinx.yaml
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Zynq Platforms
maintainers:
- - Michal Simek <michal.simek@xilinx.com>
+ - Michal Simek <michal.simek@amd.com>
description: |
Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
@@ -61,10 +61,10 @@ properties:
- const: xlnx,zynqmp-zc1254
- const: xlnx,zynqmp
- - description: Xilinx internal board zc1275
+ - description: Xilinx evaluation board zcu1275
items:
- - const: xlnx,zynqmp-zc1275-revA
- - const: xlnx,zynqmp-zc1275
+ - const: xlnx,zynqmp-zcu1275-revA
+ - const: xlnx,zynqmp-zcu1275
- const: xlnx,zynqmp
- description: Xilinx 96boards compatible board zcu100