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author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-10-18 10:10:24 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-10-18 10:10:24 +0200 |
commit | bfbf18d991756858337f7700e8ff0a6f0dc31afc (patch) | |
tree | cf3568de4fdff1891e277507f08f49a871682706 /dts/Bindings/clock/clk-exynos-audss.txt | |
parent | 834f6bf5e5f1169065376ad1aeb6a6266e66ce5c (diff) | |
download | barebox-bfbf18d991756858337f7700e8ff0a6f0dc31afc.tar.gz barebox-bfbf18d991756858337f7700e8ff0a6f0dc31afc.tar.xz |
dts: update to v4.9-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/clk-exynos-audss.txt')
-rw-r--r-- | dts/Bindings/clock/clk-exynos-audss.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/dts/Bindings/clock/clk-exynos-audss.txt b/dts/Bindings/clock/clk-exynos-audss.txt index 180e883556..0c3d601586 100644 --- a/dts/Bindings/clock/clk-exynos-audss.txt +++ b/dts/Bindings/clock/clk-exynos-audss.txt @@ -10,6 +10,8 @@ Required Properties: - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs. - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250 SoCs. + - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410 + SoCs. - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420 SoCs. - reg: physical base address and length of the controller's register set. @@ -91,5 +93,5 @@ i2s0: i2s@03830000 { <&clock_audss EXYNOS_MOUT_AUDSS>, <&clock_audss EXYNOS_MOUT_I2S>; clock-names = "iis", "i2s_opclk0", "i2s_opclk1", - "mout_audss", "mout_i2s"; + "mout_audss", "mout_i2s"; }; |