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authorSascha Hauer <s.hauer@pengutronix.de>2021-08-09 21:17:51 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-08-09 21:17:51 +0200
commit6187b17da4b277417f34fe0b0b90bbaddcbc599e (patch)
tree51cbbaa0fa325c592d084eb7d197a5df0e7a43bb /dts/Bindings/clock/idt,versaclock5.yaml
parentc53e1fc545e686e1f48c8efb9057fc72e158f183 (diff)
downloadbarebox-6187b17da4b277417f34fe0b0b90bbaddcbc599e.tar.gz
barebox-6187b17da4b277417f34fe0b0b90bbaddcbc599e.tar.xz
dts: update to v5.14-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/idt,versaclock5.yaml')
-rw-r--r--dts/Bindings/clock/idt,versaclock5.yaml7
1 files changed, 4 insertions, 3 deletions
diff --git a/dts/Bindings/clock/idt,versaclock5.yaml b/dts/Bindings/clock/idt,versaclock5.yaml
index 28675b0b80..26ed040bc7 100644
--- a/dts/Bindings/clock/idt,versaclock5.yaml
+++ b/dts/Bindings/clock/idt,versaclock5.yaml
@@ -84,6 +84,7 @@ patternProperties:
idt,slew-percent:
description: The Slew rate control for CMOS single-ended.
enum: [ 80, 85, 90, 100 ]
+ additionalProperties: false
required:
- compatible
@@ -139,13 +140,13 @@ examples:
clock-names = "xin";
OUT1 {
- idt,drive-mode = <VC5_CMOSD>;
- idt,voltage-microvolts = <1800000>;
+ idt,mode = <VC5_CMOSD>;
+ idt,voltage-microvolt = <1800000>;
idt,slew-percent = <80>;
};
OUT4 {
- idt,drive-mode = <VC5_LVDS>;
+ idt,mode = <VC5_LVDS>;
};
};
};