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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-03 08:11:01 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-03 08:11:01 +0100 |
commit | eaa819409db6ac80fbd7c3d36450b2d1bec93576 (patch) | |
tree | 6cd5e0c7f8abe121af237b701ee9e0e1b6f7e40d /dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt | |
parent | 0c9aadb6185e1d84746b632284bc89e4e4c80cd3 (diff) | |
download | barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.gz barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.xz |
dts: update to v4.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt')
-rw-r--r-- | dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt b/dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt index e6ad35b894..b02944fba9 100644 --- a/dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt +++ b/dts/Bindings/clock/renesas,rcar-gen2-cpg-clocks.txt @@ -8,15 +8,18 @@ Required Properties: - compatible: Must be one of - "renesas,r8a7790-cpg-clocks" for the r8a7790 CPG - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG + - "renesas,r8a7793-cpg-clocks" for the r8a7793 CPG - "renesas,r8a7794-cpg-clocks" for the r8a7794 CPG - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG - reg: Base address and length of the memory resource used by the CPG - - clocks: Reference to the parent clock + - clocks: References to the parent clocks: first to the EXTAL clock, second + to the USB_EXTAL clock - #clock-cells: Must be 1 - clock-output-names: The names of the clocks. Supported clocks are "main", - "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1" and "z" + "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", "z", "rcan", and + "adsp" Example @@ -26,8 +29,9 @@ Example compatible = "renesas,r8a7790-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0, "pll1", "pll3", - "lb", "qspi", "sdh", "sd0", "sd1", "z"; + "lb", "qspi", "sdh", "sd0", "sd1", "z", + "rcan", "adsp"; }; |