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authorSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
commita4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch)
treeef97762be5b614f160e9affddd1bbbec43c007dc /dts/Bindings/clock/xgene.txt
parent83e61900b02965d01f0885e2db2077df35be7f56 (diff)
downloadbarebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz
barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.xz
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/clock/xgene.txt')
-rw-r--r--dts/Bindings/clock/xgene.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/dts/Bindings/clock/xgene.txt b/dts/Bindings/clock/xgene.txt
index 1c4ef773fe..82f9638121 100644
--- a/dts/Bindings/clock/xgene.txt
+++ b/dts/Bindings/clock/xgene.txt
@@ -9,6 +9,8 @@ Required properties:
"apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
"apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
"apm,xgene-device-clock" - for a X-Gene device clock
+ "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
+ "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
Required properties for SoC or PCP PLL clocks:
- reg : shall be the physical PLL register address for the pll clock.